feat(esp_gdma): adapt the gdma driver to ahb-dma and axi-dma

components/soc/esp32p4/include/soc/Kconfig.soc_caps.in

@@ -195,17 +195,21 @@ config SOC_DS_KEY_CHECK_MAX_WAIT_US
     int
     default 1100
 
-config SOC_GDMA_GROUPS
+config SOC_AHB_GDMA_VERSION
     int
-    default 1
+    default 2
 
-config SOC_GDMA_PAIRS_PER_GROUP
+config SOC_GDMA_NUM_GROUPS_MAX
+    int
+    default 2
+
+config SOC_GDMA_PAIRS_PER_GROUP_MAX
     int
     default 3
 
 config SOC_GDMA_SUPPORT_ETM
     bool
-    default n
+    default y
 
 config SOC_ETM_GROUPS
     int

components/soc/esp32p4/include/soc/gdma_channel.h

@@ -5,3 +5,41 @@
  */
 
 #pragma once
+
+// The following macros have a format SOC_[periph][instance_id] to make it work with `GDMA_MAKE_TRIGGER`
+#define SOC_GDMA_TRIG_PERIPH_M2M0     -1
+#define SOC_GDMA_TRIG_PERIPH_I3C0     0
+#define SOC_GDMA_TRIG_PERIPH_UHCI0    2
+#define SOC_GDMA_TRIG_PERIPH_I2S0     3
+#define SOC_GDMA_TRIG_PERIPH_I2S1     4
+#define SOC_GDMA_TRIG_PERIPH_I2S2     5
+#define SOC_GDMA_TRIG_PERIPH_ADC0     8
+#define SOC_GDMA_TRIG_PERIPH_RMT0     10
+#define SOC_GDMA_TRIG_PERIPH_LCD0     0
+#define SOC_GDMA_TRIG_PERIPH_CAM0     0
+#define SOC_GDMA_TRIG_PERIPH_SPI2     1
+#define SOC_GDMA_TRIG_PERIPH_SPI3     2
+#define SOC_GDMA_TRIG_PERIPH_PARLIO0  3
+#define SOC_GDMA_TRIG_PERIPH_AES0     4
+#define SOC_GDMA_TRIG_PERIPH_SHA0     5
+
+// On which system bus is the DMA instance of the peripheral connection mounted
+#define SOC_GDMA_BUS_ANY -1
+#define SOC_GDMA_BUS_AHB 0
+#define SOC_GDMA_BUS_AXI 1
+
+#define SOC_GDMA_TRIG_PERIPH_M2M0_BUS     SOC_GDMA_BUS_ANY
+#define SOC_GDMA_TRIG_PERIPH_UHCI0_BUS    SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_I2S0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_I2S1_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_I2S2_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_ADC0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_RMT0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_I3C0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_SPI2_BUS     SOC_GDMA_BUS_AXI
+#define SOC_GDMA_TRIG_PERIPH_SPI3_BUS     SOC_GDMA_BUS_AXI
+#define SOC_GDMA_TRIG_PERIPH_LCD0_BUS     SOC_GDMA_BUS_AXI
+#define SOC_GDMA_TRIG_PERIPH_CAM0_BUS     SOC_GDMA_BUS_AXI
+#define SOC_GDMA_TRIG_PERIPH_AES0_BUS     SOC_GDMA_BUS_AXI
+#define SOC_GDMA_TRIG_PERIPH_SHA0_BUS     SOC_GDMA_BUS_AXI
+#define SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS  SOC_GDMA_BUS_AXI

components/soc/esp32p4/include/soc/soc_caps.h

@@ -30,6 +30,8 @@
 // #define SOC_DEDICATED_GPIO_SUPPORTED    1  //TODO: IDF-7552
 #define SOC_UART_SUPPORTED              1
 // #define SOC_GDMA_SUPPORTED              1  //TODO: IDF-6504
+// #define SOC_AHB_GDMA_SUPPORTED          1
+// #define SOC_AXI_GDMA_SUPPORTED          1
 // #define SOC_GPTIMER_SUPPORTED           1  //TODO: IDF-6515
 // #define SOC_PCNT_SUPPORTED              1  //TODO: IDF-7475
 // #define SOC_MCPWM_SUPPORTED             1  //TODO: IDF-7493
@@ -154,9 +156,10 @@
 #define SOC_DS_KEY_CHECK_MAX_WAIT_US (1100)
 
 /*-------------------------- GDMA CAPS -------------------------------------*/
-#define SOC_GDMA_GROUPS                 (1U) // Number of GDMA groups
-#define SOC_GDMA_PAIRS_PER_GROUP        (3)  // Number of GDMA pairs in each group
-#define SOC_GDMA_SUPPORT_ETM            (0)  // Support ETM submodule
+#define SOC_AHB_GDMA_VERSION            2
+#define SOC_GDMA_NUM_GROUPS_MAX         2
+#define SOC_GDMA_PAIRS_PER_GROUP_MAX    3
+#define SOC_GDMA_SUPPORT_ETM            1  // Both AHB-DMA and AXI-DMA supports ETM
 
 /*-------------------------- ETM CAPS --------------------------------------*/
 #define SOC_ETM_GROUPS                  1U  // Number of ETM groups
@@ -421,7 +424,6 @@
 
 /*-------------------------- MEMPROT CAPS ------------------------------------*/
 
-
 /*-------------------------- UART CAPS ---------------------------------------*/
 // ESP32-P4 has 2 UARTs
 #define SOC_UART_NUM                    (2)