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feat(ana_cmpr): support analog comparator on esp32h21

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This commit is contained in:
morris
2026-03-23 10:28:29 +08:00
parent ed7c90c8aa
commit 9cad94e697
39 changed files with 211 additions and 178 deletions
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components/soc/esp32h21/include/soc/Kconfig.soc_caps.in
+4 -8
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@@ -3,6 +3,10 @@
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################
config SOC_ANA_CMPR_SUPPORTED
bool
default y
config SOC_DEDICATED_GPIO_SUPPORTED
bool
default y
@@ -443,14 +447,6 @@ config SOC_RTCIO_HOLD_SUPPORTED
bool
default y
config SOC_ANA_CMPR_NUM
int
default 1
config SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO
bool
default y
config SOC_I2C_NUM
int
default 2
components/soc/esp32h21/include/soc/ana_cmpr_pins.h
+10
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@@ -0,0 +1,10 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
#pragma once
#define ANA_CMPR0_EXT_REF_GPIO 6 /*!< The GPIO that can be used as external reference voltage */
#define ANA_CMPR0_SRC_GPIO 7 /*!< The GPIO that used for inputting the source signal to compare */
components/soc/esp32h21/include/soc/clk_tree_defs.h
+16
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@@ -204,6 +204,22 @@ typedef enum {
SDM_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F48M, /*!< Select PLL_F48M as the default clock choice */
} soc_periph_sdm_clk_src_t;
///////////////////////////////////////////////////Analog Comparator////////////////////////////////////////////////////
/**
* @brief Array initializer for all supported clock sources of Analog Comparator
*/
#define SOC_ANA_CMPR_CLKS {SOC_MOD_CLK_PLL_F48M, SOC_MOD_CLK_XTAL}
/**
* @brief Analog Comparator clock source
*/
typedef enum {
ANA_CMPR_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL clock as the source clock */
ANA_CMPR_CLK_SRC_PLL_F48M = SOC_MOD_CLK_PLL_F48M, /*!< Select PLL_F48M clock as the source clock */
ANA_CMPR_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F48M, /*!< Select PLL_F48M as the default clock choice */
} soc_periph_ana_cmpr_clk_src_t;
//////////////////////////////////////////////////GPIO Glitch Filter////////////////////////////////////////////////////
/**
components/soc/esp32h21/include/soc/soc_caps.h
+1 -5
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@@ -24,7 +24,7 @@
/*-------------------------- COMMON CAPS ---------------------------------------*/
// #define SOC_ADC_SUPPORTED 1 //TODO: [ESP32H21] IDF-11589, IDF-11592
// #define SOC_ANA_CMPR_SUPPORTED 1
#define SOC_ANA_CMPR_SUPPORTED 1
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_UART_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
@@ -237,10 +237,6 @@
#define SOC_RTCIO_PIN_COUNT (7U)
#define SOC_RTCIO_HOLD_SUPPORTED (1)
/*------------------------- Analog Comparator CAPS ---------------------------*/
#define SOC_ANA_CMPR_NUM (1U)
#define SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO (1)
/*-------------------------- I2C CAPS ----------------------------------------*/
#define SOC_I2C_NUM (2U)
#define SOC_HP_I2C_NUM (2U)