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feat(spi_master): add test clock src and config validation

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wanlei
2024-11-15 14:59:49 +08:00
committed by Wan Lei
parent b5eca3a8a1
commit 9aeaf03f95
5 changed files with 86 additions and 94 deletions
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components/soc/esp32c6/include/soc/clk_tree_defs.h
+1 -1
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@@ -19,7 +19,7 @@ extern "C" {
*
* 2) External 40MHz Crystal Clock: XTAL
*
* 3) Internal 136kHz RC Oscillator: RC_SLOW (may also referrred as SOSC in TRM or reg. description)
* 3) Internal 136kHz RC Oscillator: RC_SLOW (may also referred as SOSC in TRM or reg. description)
*
* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
* can be computed in runtime through calibration.