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feat(freertos): speed up SMP critical section enter and exit
The critical section port already disables interrupts and reads the core id for the whole section, but spinlock_acquire()/spinlock_release() then disabled interrupts again to the same level and re-read the core id register. Add spinlock_acquire_impl()/spinlock_release_impl(), which take a caller-supplied owner id and skip interrupt management, and reuse them from spinlock_acquire()/spinlock_release() to avoid duplicated code. The Xtensa and RISC-V ports now read the core id once and call the impl variants, removing one core id read and one interrupt mask/restore per critical section enter and exit. Closes https://github.com/espressif/esp-idf/issues/18908
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@@ -143,13 +143,17 @@ BaseType_t xPortEnterCriticalTimeout(portMUX_TYPE *lock, BaseType_t timeout)
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* saved level can be restored on the last call to exit the critical.
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*/
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BaseType_t xOldInterruptLevel = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
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if (!spinlock_acquire(lock, timeout)) {
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/* Interrupts are masked (to XCHAL_EXCM_LEVEL, the same level the spinlock uses),
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* so the core id is stable and the spinlock does not need to mask again. Read the
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* core id register once and reuse it for the owner id and the nesting index. */
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uint32_t coreOwnerId = spinlock_owner_id();
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BaseType_t coreID = spinlock_core_id_from_owner_id(coreOwnerId);
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if (!spinlock_acquire_impl(lock, timeout, coreOwnerId)) {
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//Timed out attempting to get spinlock. Restore previous interrupt level and return
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XTOS_RESTORE_JUST_INTLEVEL((int) xOldInterruptLevel);
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return pdFAIL;
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}
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//Spinlock acquired. Increment the IDF critical nesting count.
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BaseType_t coreID = xPortGetCoreID();
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BaseType_t newNesting = port_uxCriticalNestingIDF[coreID] + 1;
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port_uxCriticalNestingIDF[coreID] = newNesting;
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//If this is the first entry to a critical section. Save the old interrupt level.
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@@ -171,8 +175,12 @@ void vPortExitCriticalIDF(portMUX_TYPE *lock)
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* to re-enable interrupts if this is the last call to exit the critical. We
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* can use the nesting count to determine whether this is the last exit call.
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*/
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spinlock_release(lock);
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BaseType_t coreID = xPortGetCoreID();
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/* Interrupts remain disabled for the whole critical section, so the core id is
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* stable and the spinlock does not need to mask again. Read the core id register
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* once and reuse it for the owner id and the nesting index. */
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uint32_t coreOwnerId = spinlock_owner_id();
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BaseType_t coreID = spinlock_core_id_from_owner_id(coreOwnerId);
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spinlock_release_impl(lock, coreOwnerId);
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BaseType_t nesting = port_uxCriticalNestingIDF[coreID];
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/* Critical section nesting count must never be negative */
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