From 853726de893cf1808d1c2cdea40d139541272807 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Tue, 19 Aug 2025 20:53:13 +0800 Subject: [PATCH 01/16] feat(wifi): support wifi mac bb pd context retention for s31 --- components/esp_phy/esp32s31/phy_init_data.c | 52 ++++++++++++++------- 1 file changed, 34 insertions(+), 18 deletions(-) diff --git a/components/esp_phy/esp32s31/phy_init_data.c b/components/esp_phy/esp32s31/phy_init_data.c index e6a2b1eac44..4d635da82bb 100644 --- a/components/esp_phy/esp32s31/phy_init_data.c +++ b/components/esp_phy/esp32s31/phy_init_data.c @@ -157,26 +157,42 @@ static const char* TAG = "phy_sleep"; static esp_err_t sleep_retention_wifi_bb_init(void *arg) { - #define N_REGS_WIFI_AGC() (130) - #define N_REGS_WIFI_TX() (30) - #define N_REGS_WIFI_NRX() (145) - #define N_REGS_WIFI_BB() (82) - #define N_REGS_WIFI_BRX() (39) - #define N_REGS_WIFI_FE_COEX() (21) - #define N_REGS_WIFI_FE_DATA() (34) - #define N_REGS_WIFI_FE_CTRL() (56) - #define N_REGS_WIFI_FE_WIFI() (21) + #define N_REGS_WIFI_AGC() (130) + #define N_REGS_WIFI_TX() (32) + #define N_REGS_WIFI_NRX() (145) + #define N_REGS_WIFI_BB() (84) + #define N_REGS_WIFI_BRX() (39) + #define N_REGS_WIFI_FE_COEX() (22) + #define N_REGS_WIFI_FE_DATA() (35) + #define N_REGS_WIFI_FE_CTRL() (57) + #define N_REGS_WIFI_FE_DATA_WIFI() (22) + #define AGC_BASE 0x20107000 + #define BB_TX_BASE 0x20107400 + #define NRX_BASE 0x20107800 + #define BB_BASE 0x20107C00 + #define BRX_BASE 0x20108000 + #define REG_FECOEX_BASE 0x20100000 + #define REG_FEDATA_BASE 0x20100400 + #define REG_FECTRL_BASE 0x20100800 + #define REG_FEDATAWIFI_BASE 0x20100c00 +/* +AGC agc_reg: 0x000 ~0x204  130 +BB bb_reg: 0x000~0x14c 84 +BB_TX bb_tx_reg: 0x000~0x07c 32 +BRX brx_reg: 0x000~0x098 39 +NRX: 0x000~0x240 145 +*/ const static sleep_retention_entries_config_t bb_regs_retention[] = { - [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b00, 0x600a7000, 0x600a7000, N_REGS_WIFI_AGC(), 0, 0), .owner = BIT(0) | BIT(1) }, /* AGC */ - [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b01, 0x600a7400, 0x600a7400, N_REGS_WIFI_TX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* TX */ - [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b02, 0x600a7800, 0x600a7800, N_REGS_WIFI_NRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* NRX */ - [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b03, 0x600a7c00, 0x600a7c00, N_REGS_WIFI_BB(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BB */ - [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b05, 0x600a0000, 0x600a0000, N_REGS_WIFI_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ - [5] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b06, 0x600a8000, 0x600a8000, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ - [6] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b07, 0x600a0400, 0x600a0400, N_REGS_WIFI_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ - [7] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b08, 0x600a0800, 0x600a0800, N_REGS_WIFI_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ - [8] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b09, 0x600a0c00, 0x600a0c00, N_REGS_WIFI_FE_WIFI(), 0, 0), .owner = BIT(0) | BIT(1) } /* FE WiFi DATA */ + [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b00, AGC_BASE, AGC_BASE, N_REGS_WIFI_AGC(), 0, 0), .owner = BIT(0) | BIT(1) }, /* AGC */ + [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b01, BB_TX_BASE, BB_TX_BASE, N_REGS_WIFI_TX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* TX */ + [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b02, NRX_BASE, NRX_BASE, N_REGS_WIFI_NRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* NRX */ + [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b03, BB_BASE, BB_BASE, N_REGS_WIFI_BB(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BB */ + [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b05, REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_WIFI_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ + [5] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b06, BRX_BASE, BRX_BASE, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ + [6] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b07, REG_FEDATA_BASE, REG_FEDATA_BASE, N_REGS_WIFI_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ + [7] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b08, REG_FECTRL_BASE, REG_FECTRL_BASE, N_REGS_WIFI_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ + [8] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b09, REG_FEDATAWIFI_BASE, REG_FEDATAWIFI_BASE, N_REGS_WIFI_FE_DATA_WIFI(), 0, 0), .owner = BIT(0) | BIT(1) } /* FE WIFI DATA */ }; esp_err_t err = sleep_retention_entries_create(bb_regs_retention, ARRAY_SIZE(bb_regs_retention), 3, SLEEP_RETENTION_MODULE_WIFI_BB); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "WiFi BB"); From d0434b0ddd419ad759f94a01b3a8c4e0d3fa1e29 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Wed, 27 Aug 2025 21:03:09 +0800 Subject: [PATCH 02/16] change(esp_hw_support): enable wifi beacon wakeup and support wifi modem state for esp32s31 --- .../port/esp32s31/sleep_modem_state.c | 154 ++++++++++++++++++ .../esp32s31/include/soc/Kconfig.soc_caps.in | 4 + .../soc/esp32s31/include/soc/soc_caps.h | 3 +- 3 files changed, 160 insertions(+), 1 deletion(-) create mode 100644 components/esp_hw_support/lowpower/port/esp32s31/sleep_modem_state.c diff --git a/components/esp_hw_support/lowpower/port/esp32s31/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32s31/sleep_modem_state.c new file mode 100644 index 00000000000..b7414494ab6 --- /dev/null +++ b/components/esp_hw_support/lowpower/port/esp32s31/sleep_modem_state.c @@ -0,0 +1,154 @@ +/* + * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "esp_log.h" +#include "esp_check.h" +#include "esp_attr.h" + +#include "soc/soc_caps.h" +#include "soc/pmu_reg.h" + +#include "modem/i2c_ana_mst_reg.h" +#include "modem/modem_syscon_reg.h" +#include "modem/modem_lpcon_reg.h" + +#include "esp_private/sleep_modem.h" +#include "esp_private/sleep_retention.h" + +#if SOC_PM_SUPPORT_PMU_MODEM_STATE + +#define SARADC_TSENS_REG (0x20818000) +#define SARADC_TSENS_PU (BIT(22)) +#define PMU_RF_PWR_REG (0x20704184) + +#define FECOEX_SET_FREQ_SET_CHAN_REG (0x2010001c) +#define FECOEX_SET_CHAN_EN (BIT(19)) +#define FECOEX_SET_FREQ_SET_CHAN_ST_REG (0x20100028) +#define FECOEX_SET_CHAN_DONE (BIT(8)) +#define FECOEX_AGC_CONF_REG (0x20107030) +#define FECOEX_AGC_DIS (BIT(29)) + +#define WDEVTXQ_BLOCK (0x20104cac) +#define WDEV_RXBLOCK (BIT(12)) + +static __attribute__((unused)) const char *TAG = "sleep"; + +#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC + +typedef struct { +#define DESC_IDX_I2C_MST_ENA (0) +#define DESC_IDX_I2C_MST_DIS (1) + void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; +} sleep_modem_state_phy_link_context_t; + +static esp_err_t sleep_modem_state_phy_wifi_init(void *arg) +{ + #define WIFIMAC_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC)) + + static sleep_retention_entries_config_t wifi_modem_config[] = { + [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = WIFIMAC_ENTRY() }, /* I2C MST enable */ + + /* PMU or software to trigger enable RF PHY */ + [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), .owner = WIFIMAC_ENTRY() }, /* BBPLL calibration enable */ + [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), PMU_RF_PWR_REG, 0xffff0000, 0xffff0000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [3] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [4] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), .owner = WIFIMAC_ENTRY() }, + [5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_I2C_MST_BURST_DONE, 0x1, 1, 0), .owner = WIFIMAC_ENTRY() }, + [6] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x80000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [7] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x80000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), .owner = WIFIMAC_ENTRY() }, + [9] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), .owner = WIFIMAC_ENTRY() }, + [10] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), .owner = WIFIMAC_ENTRY() }, + + /* PMU to trigger enable RXBLOCK */ + [11] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), .owner = WIFIMAC_ENTRY() }, + + /* PMU or software to trigger disable RF PHY */ + [12] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [13] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), .owner = WIFIMAC_ENTRY() }, + [14] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x80000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [15] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 1), .owner = WIFIMAC_ENTRY() }, + [16] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x10), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_I2C_MST_BURST_DONE, 0x1, 1, 1), .owner = WIFIMAC_ENTRY() }, + [17] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), SARADC_TSENS_REG, 0, 0x400000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [18] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), PMU_RF_PWR_REG, 0, 0xffff0000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [19] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), .owner = WIFIMAC_ENTRY() }, /* BBPLL calibration disable */ + + [20] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), .owner = WIFIMAC_ENTRY() }, /* I2C MST disable */ + + /* PMU to trigger disable RXBLOCK */ + [21] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [22] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [23] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = WIFIMAC_ENTRY() }, + + [24] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [25] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1), .owner = WIFIMAC_ENTRY() } + }; + extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); + wifi_modem_config[4].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + wifi_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + esp_err_t err = sleep_retention_entries_create(wifi_modem_config, ARRAY_SIZE(wifi_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link for wifi modem state"); + return ESP_OK; +} +#endif + +esp_err_t sleep_modem_state_phy_link_init(void **link_head) +{ + esp_err_t err = ESP_OK; + +#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC + sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = sleep_modem_state_phy_wifi_init, .arg = NULL } } }; + err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_MODEM_PHY, &init_param); + if (err == ESP_OK) { + err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_MODEM_PHY); + if (err == ESP_OK) { + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14) }; + static DRAM_ATTR sleep_modem_state_phy_link_context_t phy_link_context; + + for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { + void *desc = sleep_retention_find_link_by_id(id_array[i]); + if (desc) { + phy_link_context.regdma_desc[i] = desc; + } else { + err = ESP_ERR_NOT_FOUND; + } + } + if (err == ESP_OK) { + *link_head = (void *)&phy_link_context; + } + } + } +#endif + return err; +} + +void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags) +{ +#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC + sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context; + + if (flags & BIT(0)) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], true, true); + } else { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, false); + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], false, true); + } +#endif +} + +esp_err_t sleep_modem_state_phy_link_deinit(void *link_head) +{ + esp_err_t err = ESP_OK; +#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC + err = sleep_retention_module_free(SLEEP_RETENTION_MODULE_MODEM_PHY); + if (err == ESP_OK) { + sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_MODEM_PHY); + } +#endif + return err; +} + +#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index 1f959f5e9c9..1dad4c124f4 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1543,6 +1543,10 @@ config SOC_PM_MODEM_RETENTION_BY_REGDMA bool default y +config SOC_PM_SUPPORT_PMU_MODEM_STATE + bool + default y + config SOC_PM_RETENTION_MODULE_NUM int default 64 diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index 544e6650a1f..1d1b565d743 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -572,7 +572,8 @@ #define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1) #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1) -// #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) // TODO: [ESP32S31] IDF-14582 +#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) +#define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE #define SOC_PM_RETENTION_MODULE_NUM (64) From 32a7c32c254e1394b4270285bf9404633f821462 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Mon, 8 Jun 2026 17:40:20 +0800 Subject: [PATCH 03/16] bugfix(apm): workaround to clear apm related reg on S31 Until full TEE/APM retention is supported (IDF-14620). --- .../esp_hw_support/sleep_system_peripheral.c | 12 +++++++++++- .../esp32s31/include/soc/system_periph_retention.h | 14 ++++++++++++++ components/soc/esp32s31/system_retention_periph.c | 13 +++++++++++++ 3 files changed, 38 insertions(+), 1 deletion(-) diff --git a/components/esp_hw_support/sleep_system_peripheral.c b/components/esp_hw_support/sleep_system_peripheral.c index 0a76f5550a2..4ba97729ad9 100644 --- a/components/esp_hw_support/sleep_system_peripheral.c +++ b/components/esp_hw_support/sleep_system_peripheral.c @@ -45,6 +45,16 @@ static __attribute__((unused)) esp_err_t sleep_sys_periph_tee_apm_retention_init #endif return ESP_OK; } +#elif CONFIG_IDF_TARGET_ESP32S31 +/* Workaround (IDF-14620): full TEE/APM retention is not supported yet on ESP32S31, only disable all + * APM control filters at the retention backup/restore stages here. */ +static __attribute__((unused)) esp_err_t sleep_sys_periph_tee_apm_retention_init(void *arg) +{ + esp_err_t err = sleep_retention_entries_create(tee_apm_filter_disable_regs_retention, ARRAY_SIZE(tee_apm_filter_disable_regs_retention), REGDMA_LINK_PRI_NON_CRITICAL_TEE_APM, SLEEP_RETENTION_MODULE_SYS_PERIPH); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "TEE/APM"); + ESP_LOGD(TAG, "TEE/APM sleep retention initialization"); + return ESP_OK; +} #endif #if CONFIG_ESP_CONSOLE_UART @@ -136,7 +146,7 @@ static __attribute__((unused)) esp_err_t sleep_sys_periph_retention_init(void *a err = sleep_sys_periph_cache_retention_init(); if(err) goto error; #endif -#if SOC_APM_SUPPORTED +#if SOC_APM_SUPPORTED || CONFIG_IDF_TARGET_ESP32S31 err = sleep_sys_periph_tee_apm_retention_init(arg); if(err) goto error; #endif diff --git a/components/soc/esp32s31/include/soc/system_periph_retention.h b/components/soc/esp32s31/include/soc/system_periph_retention.h index 50d3028e3d2..aab9a5ae082 100644 --- a/components/soc/esp32s31/include/soc/system_periph_retention.h +++ b/components/soc/esp32s31/include/soc/system_periph_retention.h @@ -45,6 +45,20 @@ extern const regdma_entries_config_t cache_regs_retention[CACHE_RETENTION_LINK_L #define TEE_APM_RETENTION_LINK_LEN 14 extern const regdma_entries_config_t tee_apm_regs_retention[TEE_APM_RETENTION_LINK_LEN]; +#if !SOC_APM_SUPPORTED +/** + * @brief Provide access to the APM control filter disable retention context. + * + * Workaround (IDF-14620): until full TEE/APM retention is supported, this only disables all APM + * control filters at the retention backup/restore stages. + * + * This is an internal function of the sleep retention driver, and is not + * useful for external use. + */ +#define TEE_APM_FILTER_DISABLE_RETENTION_LINK_LEN 3 +extern const regdma_entries_config_t tee_apm_filter_disable_regs_retention[TEE_APM_FILTER_DISABLE_RETENTION_LINK_LEN]; +#endif // !SOC_APM_SUPPORTED + /** * @brief Provide access to hp_system configuration registers retention * context definition. diff --git a/components/soc/esp32s31/system_retention_periph.c b/components/soc/esp32s31/system_retention_periph.c index 57ac5b638de..a518b940d26 100644 --- a/components/soc/esp32s31/system_retention_periph.c +++ b/components/soc/esp32s31/system_retention_periph.c @@ -21,6 +21,7 @@ #include "soc/timer_group_reg.h" #include "soc/uart_reg.h" #include "esp32s31/rom/cache.h" +#include "soc/lp_apm_reg.h" #include "soc/hp_apm_reg.h" #include "soc/cpu_apm_reg.h" #include "soc/hp_mem_apm_reg.h" @@ -86,6 +87,18 @@ const regdma_entries_config_t tee_apm_regs_retention[] = { }; _Static_assert(ARRAY_SIZE(tee_apm_regs_retention) == TEE_APM_RETENTION_LINK_LEN, "Inconsistent HP_SYSTEM retention link length definitions"); +#if !SOC_APM_SUPPORTED +/* Workaround (IDF-14620): until full TEE/APM retention is supported, just disable all APM control + * filters (equivalent to apm_hal_enable_ctrl_filter_all(false)) by writing 0 to the APM control + * registers at the retention backup/restore stages. */ +const regdma_entries_config_t tee_apm_filter_disable_regs_retention[] = { + [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TEEAPM_LINK(0x0e), LP_APM_FUNC_CTRL_REG, 0, 0xFFFFFFFF, 0, 0), .owner = ENTRY(0) | ENTRY(2) }, + [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TEEAPM_LINK(0x0f), HP_APM_FUNC_CTRL_REG, 0, 0xFFFFFFFF, 0, 0), .owner = ENTRY(0) | ENTRY(2) }, + [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TEEAPM_LINK(0x10), HP_MEM_APM_FUNC_CTRL_REG, 0, 0xFFFFFFFF, 0, 0), .owner = ENTRY(0) | ENTRY(2) }, +}; +_Static_assert(ARRAY_SIZE(tee_apm_filter_disable_regs_retention) == TEE_APM_FILTER_DISABLE_RETENTION_LINK_LEN, "Inconsistent TEE_APM filter disable retention link length definitions"); +#endif // !SOC_APM_SUPPORTED + /* HP System Registers Context */ #define N_REGS_HP_SYSTEM() (((HP_SYSTEM_GMAC1_PAD_BIST_INT_ENA_REG - DR_REG_HP_SYS_BASE) / 4) + 1) const regdma_entries_config_t hp_system_regs_retention[] = { From 3ec6a5098634b9fc7860040ef7aab8059e18aca4 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Mon, 8 Jun 2026 17:40:44 +0800 Subject: [PATCH 04/16] update(sleep_clock.c): update clock retention --- .../lowpower/port/esp32s31/sleep_clock.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c b/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c index 9f2392b21ee..1c7684ba18a 100644 --- a/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c +++ b/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c @@ -20,19 +20,19 @@ esp_err_t sleep_clock_system_retention_init(void *arg) const static sleep_retention_entries_config_t pcr_regs_retention[] = { /* Enable i2c master clock */ - [0] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(0), LP_PERICLKRST_I2CMST_CTRL_REG, LP_PERICLKRST_LP_I2CMST_CLK_EN, LP_PERICLKRST_LP_I2CMST_CLK_EN_M, 1, 0), .owner = ENTRY(0) }, + [0] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(0), LP_PERICLKRST_I2CMST_CTRL_REG, LP_PERICLKRST_LP_I2CMST_CLK_EN, LP_PERICLKRST_LP_I2CMST_CLK_EN_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, /* Start SYSPLL self-calibration */ - [1] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(1), HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, 0, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP_M, 1, 0), .owner = ENTRY(0) }, + [1] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(1), HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, 0, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, /* Wait calibration done */ - [2] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(2), HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_CPU_PLL_CAL_END, HP_SYS_CLKRST_REG_CPU_PLL_CAL_END_M, 1, 0), .owner = ENTRY(0) }, + [2] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(2), HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_CPU_PLL_CAL_END, HP_SYS_CLKRST_REG_CPU_PLL_CAL_END_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, /* Stop SYSPLL self-calibration */ - [3] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(3), HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP_M, 1, 0), .owner = ENTRY(0) }, + [3] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(3), HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, /* Clock configuration retention */ - [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PCR_LINK(4), DR_REG_HP_SYS_CLKRST_BASE, DR_REG_HP_SYS_CLKRST_BASE, N_REGS_PCR(), 0, 0), .owner = ENTRY(0) }, /* pcr */ - [5] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(5), HP_SYS_CLKRST_ROOT_CLK_CTRL0_REG, HP_SYS_CLKRST_REG_SOC_CLK_UPDATE, HP_SYS_CLKRST_REG_SOC_CLK_UPDATE_M, 1, 0), .owner = ENTRY(0) }, - [6] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(6), HP_SYS_CLKRST_ROOT_CLK_CTRL0_REG, 0x0, HP_SYS_CLKRST_REG_SOC_CLK_UPDATE_M, 1, 0), .owner = ENTRY(0) }, - [7] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(7), HP_SYS_CLKRST_SDIO_HOST_FUNC_CTRL0_REG, HP_SYS_CLKRST_REG_SDIO_LS_CLK_EDGE_CFG_UPDATE, HP_SYS_CLKRST_REG_SDIO_LS_CLK_EDGE_CFG_UPDATE_M, 1, 0), .owner = ENTRY(0) }, - [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(8), HP_SYS_CLKRST_SDIO_HOST_FUNC_CTRL0_REG, 0x0, HP_SYS_CLKRST_REG_SDIO_LS_CLK_EDGE_CFG_UPDATE_M, 1, 0), .owner = ENTRY(0) }, + [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PCR_LINK(4), DR_REG_HP_SYS_CLKRST_BASE, DR_REG_HP_SYS_CLKRST_BASE, N_REGS_PCR(), 0, 0), .owner = ENTRY(0) | ENTRY(1)}, /* pcr */ + [5] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(5), HP_SYS_CLKRST_ROOT_CLK_CTRL0_REG, HP_SYS_CLKRST_REG_SOC_CLK_UPDATE, HP_SYS_CLKRST_REG_SOC_CLK_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, + [6] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(6), HP_SYS_CLKRST_ROOT_CLK_CTRL0_REG, 0x0, HP_SYS_CLKRST_REG_SOC_CLK_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, + [7] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(7), HP_SYS_CLKRST_SDIO_HOST_FUNC_CTRL0_REG, HP_SYS_CLKRST_REG_SDIO_LS_CLK_EDGE_CFG_UPDATE, HP_SYS_CLKRST_REG_SDIO_LS_CLK_EDGE_CFG_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, + [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(8), HP_SYS_CLKRST_SDIO_HOST_FUNC_CTRL0_REG, 0x0, HP_SYS_CLKRST_REG_SDIO_LS_CLK_EDGE_CFG_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY(1)}, }; esp_err_t err = sleep_retention_entries_create(pcr_regs_retention, ARRAY_SIZE(pcr_regs_retention), REGDMA_LINK_PRI_SYS_CLK, SLEEP_RETENTION_MODULE_CLOCK_SYSTEM); @@ -44,7 +44,6 @@ esp_err_t sleep_clock_system_retention_init(void *arg) } #if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE -#include "rom/ets_sys.h" esp_err_t sleep_clock_modem_retention_init(void *arg) { #define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_RF2_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1) From 4c9cdf87107be7216e16480ac132397093eeb09e Mon Sep 17 00:00:00 2001 From: sibeibei Date: Tue, 12 May 2026 21:16:54 +0800 Subject: [PATCH 05/16] update(pmu_param): update hp modem clk config --- components/esp_hw_support/port/esp32s31/pmu_param.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/components/esp_hw_support/port/esp32s31/pmu_param.c b/components/esp_hw_support/port/esp32s31/pmu_param.c index eccb737e869..a20d9af13ae 100644 --- a/components/esp_hw_support/port/esp32s31/pmu_param.c +++ b/components/esp_hw_support/port/esp32s31/pmu_param.c @@ -140,10 +140,10 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod } #define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ - .icg_func.clock[0] = 0, \ - .icg_func.clock[1] = 0, \ - .icg_apb.clock[0] = 0, \ - .icg_apb.clock[1] = 0, \ + .icg_func.clock[0] = 0xffffffff, \ + .icg_func.clock[1] = 0xffffffff, \ + .icg_apb.clock[0] = 0xffffffff, \ + .icg_apb.clock[1] = 0xffffffff, \ .icg_modem.code = PMU_HP_ICG_MODEM_CODE_MODEM, \ .sysclk = { \ .dig_sysclk_nodiv = 0, \ From 9a3b0b5f0208f52eac7010324135f6028c1ceacd Mon Sep 17 00:00:00 2001 From: sibeibei Date: Wed, 13 May 2026 21:27:47 +0800 Subject: [PATCH 06/16] update(pmu_sleep): enable SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED --- components/esp_hw_support/port/esp32s31/pmu_sleep.c | 10 ++++++++-- .../soc/esp32s31/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32s31/include/soc/soc_caps.h | 13 +++++++++++++ 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/components/esp_hw_support/port/esp32s31/pmu_sleep.c b/components/esp_hw_support/port/esp32s31/pmu_sleep.c index 42837b69e76..0c07af6511e 100644 --- a/components/esp_hw_support/port/esp32s31/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32s31/pmu_sleep.c @@ -160,7 +160,13 @@ static inline pmu_sleep_param_config_t * pmu_sleep_param_config_default( { const pmu_sleep_machine_constant_t *mc = (pmu_sleep_machine_constant_t *)PMU_instance()->mc; - param->hp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->hp.min_slp_time_us, slowclk_period); +#if (SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) + const uint32_t slowclk_period_fixed = (slowclk_src == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) ? rtc_clk_freq_to_period(SOC_CLK_RC_SLOW_FREQ_APPROX) : slowclk_period; +#else + const uint32_t slowclk_period_fixed = slowclk_period; +#endif + + param->hp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->hp.min_slp_time_us, slowclk_period_fixed); param->hp_sys.analog_wait_target_cycle = rtc_time_us_to_fastclk(mc->hp.analog_wait_time_us, fastclk_period); param->hp_sys.digital_power_supply_wait_cycle = rtc_time_us_to_fastclk(mc->hp.power_supply_wait_time_us, fastclk_period); param->hp_sys.digital_power_up_wait_cycle = rtc_time_us_to_fastclk(mc->hp.power_up_wait_time_us, fastclk_period); @@ -168,7 +174,7 @@ static inline pmu_sleep_param_config_t * pmu_sleep_param_config_default( param->hp_sys.isolate_wait_cycle = rtc_time_us_to_fastclk(mc->hp.isolate_wait_time_us, fastclk_period); param->hp_sys.reset_wait_cycle = rtc_time_us_to_fastclk(mc->hp.reset_wait_time_us, fastclk_period); - param->lp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->lp.min_slp_time_us, slowclk_period); + param->lp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->lp.min_slp_time_us, slowclk_period_fixed); param->lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(mc->lp.analog_wait_time_us, slowclk_period); param->lp_sys.digital_power_supply_wait_cycle = rtc_time_us_to_fastclk(mc->lp.power_supply_wait_time_us, fastclk_period); param->lp_sys.digital_power_up_wait_cycle = rtc_time_us_to_fastclk(mc->lp.power_up_wait_time_us, fastclk_period); diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index 1dad4c124f4..bb5607d56f9 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1547,6 +1547,10 @@ config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y +config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED + bool + default y + config SOC_PM_RETENTION_MODULE_NUM int default 64 diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index 1d1b565d743..28cedcd7561 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -575,6 +575,19 @@ #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE +/* + * min_slp_val is derived from slow clock period (450us / slow_clk). + * With internal slow clock, frequency drift may cause min_slp_val to vary. + * If the updated value becomes larger than the previous one, modem wakeup + * path may still use the old value, leading to inconsistent PMU timing and + * potential modem state hang. + * + * Therefore, when using internal slow clock, min_slp_val is fixed after init, + * and clock drift is handled via separate timing compensation instead of + * updating this PMU threshold dynamically. + */ +#define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1) + #define SOC_PM_RETENTION_MODULE_NUM (64) /*-------------------------- LP_CORE CAPS ------------------------------------*/ From 837a4905955db4a7a46b46b37b6dec2462186d5f Mon Sep 17 00:00:00 2001 From: sibeibei Date: Tue, 28 Apr 2026 16:15:15 +0800 Subject: [PATCH 07/16] feat(wifi): adpater apb clock is independent --- components/esp_wifi/esp32/esp_adapter.c | 18 +++++++++--------- components/esp_wifi/esp32c2/esp_adapter.c | 18 +++++++++--------- components/esp_wifi/esp32c3/esp_adapter.c | 18 +++++++++--------- components/esp_wifi/esp32c5/esp_adapter.c | 16 ++++++++-------- components/esp_wifi/esp32c6/esp_adapter.c | 16 ++++++++-------- components/esp_wifi/esp32c61/esp_adapter.c | 16 ++++++++-------- components/esp_wifi/esp32p4/esp_adapter.c | 18 +++++++++--------- components/esp_wifi/esp32s2/esp_adapter.c | 18 +++++++++--------- components/esp_wifi/esp32s3/esp_adapter.c | 18 +++++++++--------- components/esp_wifi/esp32s31/esp_adapter.c | 16 ++++++++-------- .../include/esp_private/wifi_os_adapter.h | 4 ++-- components/esp_wifi/lib | 2 +- components/esp_wifi/linker.lf | 4 ++-- components/esp_wifi/src/wifi_init.c | 13 +++++++++---- .../test_apps/bin_size_apsta/README.md | 4 ++-- .../test_apps/nan_crypto_test/README.md | 4 ++-- .../esp_wifi/test_apps/wifi_connect/README.md | 4 ++-- .../esp_wifi/test_apps/wifi_function/README.md | 4 ++-- .../test_apps/wifi_nvs_config/README.md | 4 ++-- 19 files changed, 110 insertions(+), 105 deletions(-) diff --git a/components/esp_wifi/esp32/esp_adapter.c b/components/esp_wifi/esp32/esp_adapter.c index 50be0e7eb92..fc1323ad503 100644 --- a/components/esp_wifi/esp32/esp_adapter.c +++ b/components/esp_wifi/esp32/esp_adapter.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -56,8 +56,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif static void IRAM_ATTR s_esp_dport_access_stall_other_cpu_start(void) @@ -362,17 +362,17 @@ static int32_t esp_event_post_wrapper(const char* event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -671,8 +671,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = s_esp_dport_access_stall_other_cpu_start, ._dport_access_stall_other_cpu_end_wrap = s_esp_dport_access_stall_other_cpu_end, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_common_clock_enable = esp_phy_common_clock_enable, diff --git a/components/esp_wifi/esp32c2/esp_adapter.c b/components/esp_wifi/esp32c2/esp_adapter.c index febfadaaea8..9aa353363b5 100644 --- a/components/esp_wifi/esp32c2/esp_adapter.c +++ b/components/esp_wifi/esp32c2/esp_adapter.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -52,8 +52,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif IRAM_ATTR void *wifi_malloc(size_t size) @@ -276,17 +276,17 @@ static int32_t esp_event_post_wrapper(const char* event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -612,8 +612,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_update_country_info = esp_phy_update_country_info, diff --git a/components/esp_wifi/esp32c3/esp_adapter.c b/components/esp_wifi/esp32c3/esp_adapter.c index 6c61907afd4..1e66c48b210 100644 --- a/components/esp_wifi/esp32c3/esp_adapter.c +++ b/components/esp_wifi/esp32c3/esp_adapter.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -55,8 +55,8 @@ #define MHZ (1000000) #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif IRAM_ATTR void *wifi_malloc(size_t size) @@ -279,17 +279,17 @@ static int32_t esp_event_post_wrapper(const char* event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -629,8 +629,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_update_country_info = esp_phy_update_country_info, diff --git a/components/esp_wifi/esp32c5/esp_adapter.c b/components/esp_wifi/esp32c5/esp_adapter.c index e21354640b7..7023dd2f320 100644 --- a/components/esp_wifi/esp32c5/esp_adapter.c +++ b/components/esp_wifi/esp32c5/esp_adapter.c @@ -60,8 +60,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif IRAM_ATTR void *wifi_malloc(size_t size) @@ -354,17 +354,17 @@ static int32_t esp_event_post_wrapper(const char *event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -738,8 +738,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_update_country_info = esp_phy_update_country_info, diff --git a/components/esp_wifi/esp32c6/esp_adapter.c b/components/esp_wifi/esp32c6/esp_adapter.c index f3eafd771ca..bb8feb61752 100644 --- a/components/esp_wifi/esp32c6/esp_adapter.c +++ b/components/esp_wifi/esp32c6/esp_adapter.c @@ -61,8 +61,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif IRAM_ATTR void *wifi_malloc(size_t size) @@ -285,17 +285,17 @@ static int32_t esp_event_post_wrapper(const char *event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -676,8 +676,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_update_country_info = esp_phy_update_country_info, diff --git a/components/esp_wifi/esp32c61/esp_adapter.c b/components/esp_wifi/esp32c61/esp_adapter.c index 2b11cf6f64b..76ccd41730b 100644 --- a/components/esp_wifi/esp32c61/esp_adapter.c +++ b/components/esp_wifi/esp32c61/esp_adapter.c @@ -62,8 +62,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif IRAM_ATTR void *wifi_malloc(size_t size) @@ -356,17 +356,17 @@ static int32_t esp_event_post_wrapper(const char *event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -740,8 +740,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_update_country_info = esp_phy_update_country_info, diff --git a/components/esp_wifi/esp32p4/esp_adapter.c b/components/esp_wifi/esp32p4/esp_adapter.c index 8843258dfcf..1bcb7e20505 100644 --- a/components/esp_wifi/esp32p4/esp_adapter.c +++ b/components/esp_wifi/esp32p4/esp_adapter.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -49,8 +49,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif #if CONFIG_ESP_EXT_CONN_ENABLE @@ -356,17 +356,17 @@ static int32_t esp_event_post_wrapper(const char *event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -747,8 +747,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_common_clock_enable = esp_phy_common_clock_enable, diff --git a/components/esp_wifi/esp32s2/esp_adapter.c b/components/esp_wifi/esp32s2/esp_adapter.c index 08949ef9323..128a8be0a4f 100644 --- a/components/esp_wifi/esp32s2/esp_adapter.c +++ b/components/esp_wifi/esp32s2/esp_adapter.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -57,8 +57,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif /* @@ -353,17 +353,17 @@ static int32_t esp_event_post_wrapper(const char* event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -664,8 +664,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_common_clock_enable = esp_phy_common_clock_enable, diff --git a/components/esp_wifi/esp32s3/esp_adapter.c b/components/esp_wifi/esp32s3/esp_adapter.c index 805a3ad8ec3..e1072868fb1 100644 --- a/components/esp_wifi/esp32s3/esp_adapter.c +++ b/components/esp_wifi/esp32s3/esp_adapter.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -60,8 +60,8 @@ #define MHZ (1000000) #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif /* @@ -356,17 +356,17 @@ static int32_t esp_event_post_wrapper(const char* event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -683,8 +683,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_update_country_info = esp_phy_update_country_info, diff --git a/components/esp_wifi/esp32s31/esp_adapter.c b/components/esp_wifi/esp32s31/esp_adapter.c index 625f4b4b016..48b2ba9dc31 100644 --- a/components/esp_wifi/esp32s31/esp_adapter.c +++ b/components/esp_wifi/esp32s31/esp_adapter.c @@ -60,8 +60,8 @@ #define TAG "esp_adapter" #ifdef CONFIG_PM_ENABLE -extern void wifi_apb80m_request(void); -extern void wifi_apb80m_release(void); +extern void wifi_pm_sleep_lock_acquire(void); +extern void wifi_pm_sleep_lock_release(void); #endif IRAM_ATTR void *wifi_malloc(size_t size) @@ -354,17 +354,17 @@ static int32_t esp_event_post_wrapper(const char *event_base, int32_t event_id, } } -static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_acquire_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_request(); + wifi_pm_sleep_lock_acquire(); #endif } -static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +static void IRAM_ATTR wifi_pm_sleep_lock_release_wrapper(void) { #ifdef CONFIG_PM_ENABLE - wifi_apb80m_release(); + wifi_pm_sleep_lock_release(); #endif } @@ -747,8 +747,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._rand = esp_random, ._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper, ._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper, - ._wifi_apb80m_request = wifi_apb80m_request_wrapper, - ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._wifi_pm_sleep_lock_acquire = wifi_pm_sleep_lock_acquire_wrapper, + ._wifi_pm_sleep_lock_release = wifi_pm_sleep_lock_release_wrapper, ._phy_disable = esp_phy_disable_wrapper, ._phy_enable = esp_phy_enable_wrapper, ._phy_update_country_info = esp_phy_update_country_info, diff --git a/components/esp_wifi/include/esp_private/wifi_os_adapter.h b/components/esp_wifi/include/esp_private/wifi_os_adapter.h index 0c9ec1e06b8..0495a83c5c2 100644 --- a/components/esp_wifi/include/esp_private/wifi_os_adapter.h +++ b/components/esp_wifi/include/esp_private/wifi_os_adapter.h @@ -77,8 +77,8 @@ typedef struct wifi_osi_funcs_t { uint32_t (* _rand)(void); void (* _dport_access_stall_other_cpu_start_wrap)(void); void (* _dport_access_stall_other_cpu_end_wrap)(void); - void (* _wifi_apb80m_request)(void); - void (* _wifi_apb80m_release)(void); + void (* _wifi_pm_sleep_lock_acquire)(void); + void (* _wifi_pm_sleep_lock_release)(void); void (* _phy_disable)(void); void (* _phy_enable)(void); #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_ESP_WIFI_TARGET_ESP32 diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index cde32e0a504..f428c31dc56 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit cde32e0a504ec4083261156f807babf702967bb2 +Subproject commit f428c31dc5602970d0f6eed02e610589b6c2f622 diff --git a/components/esp_wifi/linker.lf b/components/esp_wifi/linker.lf index f0ff4efb82e..1f1f69f1ed3 100644 --- a/components/esp_wifi/linker.lf +++ b/components/esp_wifi/linker.lf @@ -161,8 +161,8 @@ entries: esp_adapter:wifi_clock_enable_wrapper (noflash) esp_adapter:wifi_clock_disable_wrapper (noflash) if PM_ENABLE = y: - wifi_init:wifi_apb80m_request (noflash) - wifi_init:wifi_apb80m_release (noflash) + wifi_init:wifi_pm_sleep_lock_acquire (noflash) + wifi_init:wifi_pm_sleep_lock_release (noflash) [mapping:esp_timer_wifi_pm] archive: libesp_timer.a diff --git a/components/esp_wifi/src/wifi_init.c b/components/esp_wifi/src/wifi_init.c index 216c9dfff2b..e50a7f4a19c 100644 --- a/components/esp_wifi/src/wifi_init.c +++ b/components/esp_wifi/src/wifi_init.c @@ -495,8 +495,13 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config) #ifdef CONFIG_PM_ENABLE if (s_wifi_modem_sleep_lock == NULL) { - result = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "wifi", - &s_wifi_modem_sleep_lock); + esp_pm_lock_type_t lock_type = +#if SOC_MODEM_APB_CLOCK_IS_INDEPENDENT + ESP_PM_NO_LIGHT_SLEEP; +#else + ESP_PM_APB_FREQ_MAX; +#endif + result = esp_pm_lock_create(lock_type, 0, "wifi", &s_wifi_modem_sleep_lock); if (result != ESP_OK) { ESP_LOGE(TAG, "Failed to create pm lock (0x%x)", result); goto _deinit; @@ -572,13 +577,13 @@ esp_err_t esp_wifi_disconnect(void) } #ifdef CONFIG_PM_ENABLE -void wifi_apb80m_request(void) +void wifi_pm_sleep_lock_acquire(void) { assert(s_wifi_modem_sleep_lock); esp_pm_lock_acquire(s_wifi_modem_sleep_lock); } -void wifi_apb80m_release(void) +void wifi_pm_sleep_lock_release(void) { assert(s_wifi_modem_sleep_lock); esp_pm_lock_release(s_wifi_modem_sleep_lock); diff --git a/components/esp_wifi/test_apps/bin_size_apsta/README.md b/components/esp_wifi/test_apps/bin_size_apsta/README.md index de83df56df5..44f3780f1d6 100644 --- a/components/esp_wifi/test_apps/bin_size_apsta/README.md +++ b/components/esp_wifi/test_apps/bin_size_apsta/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_wifi/test_apps/nan_crypto_test/README.md b/components/esp_wifi/test_apps/nan_crypto_test/README.md index 2555219da26..61864a63265 100644 --- a/components/esp_wifi/test_apps/nan_crypto_test/README.md +++ b/components/esp_wifi/test_apps/nan_crypto_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | # NAN Crypto Test Application diff --git a/components/esp_wifi/test_apps/wifi_connect/README.md b/components/esp_wifi/test_apps/wifi_connect/README.md index de83df56df5..44f3780f1d6 100644 --- a/components/esp_wifi/test_apps/wifi_connect/README.md +++ b/components/esp_wifi/test_apps/wifi_connect/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_wifi/test_apps/wifi_function/README.md b/components/esp_wifi/test_apps/wifi_function/README.md index a1466d0f379..e0c2bb1e27e 100644 --- a/components/esp_wifi/test_apps/wifi_function/README.md +++ b/components/esp_wifi/test_apps/wifi_function/README.md @@ -1,3 +1,3 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_wifi/test_apps/wifi_nvs_config/README.md b/components/esp_wifi/test_apps/wifi_nvs_config/README.md index de83df56df5..44f3780f1d6 100644 --- a/components/esp_wifi/test_apps/wifi_nvs_config/README.md +++ b/components/esp_wifi/test_apps/wifi_nvs_config/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | From 1aeb7737818b0a42eb56bf092b3bd345b9210cd4 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Thu, 14 May 2026 15:43:00 +0800 Subject: [PATCH 08/16] feat(wifi): enable pll clk in modem state --- .../esp_hw_support/lowpower/port/esp32s31/sleep_clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c b/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c index 1c7684ba18a..ae796201600 100644 --- a/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c +++ b/components/esp_hw_support/lowpower/port/esp32s31/sleep_clock.c @@ -49,8 +49,8 @@ esp_err_t sleep_clock_modem_retention_init(void *arg) #define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_RF2_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1) #define N_REGS_LPCON() (((MODEM_LPCON_MODEM_INTR_STATUS_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1) const static sleep_retention_entries_config_t modem_regs_retention[] = { - [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_MODEMSYSCON_LINK(0), 0x20109c30, 0xf, 0xffffffff, 1, 0), .owner = ENTRY(0) | ENTRY(1) }, - [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(1), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, 12, 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */ + [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(0), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, 12, 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */ + [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_CLOCK_ICG_LINK(0), HP_SYS_CLKRST_MODEM_CONF_REG, 0x3d, 0x3d, 0, 0), .owner = ENTRY(1)}, [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMLPCON_LINK(0), MODEM_LPCON_TEST_CONF_REG, MODEM_LPCON_TEST_CONF_REG, N_REGS_LPCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */ }; From e2701060110df52bc565efa470e886afff4fcef0 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Thu, 21 May 2026 14:32:06 +0800 Subject: [PATCH 09/16] support wifi api and regdma * phy_version: 100, e0797b2, May 12 2026 --- components/esp_phy/lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_phy/lib b/components/esp_phy/lib index e37ecdc9c1e..ae6f29bfebb 160000 --- a/components/esp_phy/lib +++ b/components/esp_phy/lib @@ -1 +1 @@ -Subproject commit e37ecdc9c1e93fefda5b1a99f09bd979046d0720 +Subproject commit ae6f29bfebbfdacc1bba905afff3399fe733245f From bee381f77fab1d077c3f871b9d5fe3adc74633e9 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Thu, 14 May 2026 19:02:19 +0800 Subject: [PATCH 10/16] feat(ci): enable build for esp32s31, disable CI test --- examples/wifi/.build-test-rules.yml | 1 + examples/wifi/power_save/README.md | 4 ++-- examples/wifi/power_save/sdkconfig.defaults.esp32s31 | 2 ++ tools/ci/ignore_build_warnings.txt | 1 + 4 files changed, 6 insertions(+), 2 deletions(-) create mode 100644 examples/wifi/power_save/sdkconfig.defaults.esp32s31 diff --git a/examples/wifi/.build-test-rules.yml b/examples/wifi/.build-test-rules.yml index 23a03fe094a..39bac60b7a2 100644 --- a/examples/wifi/.build-test-rules.yml +++ b/examples/wifi/.build-test-rules.yml @@ -86,6 +86,7 @@ examples/wifi/power_save: - if: SOC_WIFI_SUPPORTED != 1 temporary: true reason: requires hardware support + disable_test: - if: IDF_TARGET in ["esp32s31"] temporary: true reason: lack of runners diff --git a/examples/wifi/power_save/README.md b/examples/wifi/power_save/README.md index af44ff0d2c0..6dd43975d79 100644 --- a/examples/wifi/power_save/README.md +++ b/examples/wifi/power_save/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | # Wifi Power Save Example diff --git a/examples/wifi/power_save/sdkconfig.defaults.esp32s31 b/examples/wifi/power_save/sdkconfig.defaults.esp32s31 new file mode 100644 index 00000000000..f001497d140 --- /dev/null +++ b/examples/wifi/power_save/sdkconfig.defaults.esp32s31 @@ -0,0 +1,2 @@ +# ESP32-S31 does not support 80 MHz; use the lowest available CPU frequency +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y diff --git a/tools/ci/ignore_build_warnings.txt b/tools/ci/ignore_build_warnings.txt index 4dae47de886..2dcb94a0120 100644 --- a/tools/ci/ignore_build_warnings.txt +++ b/tools/ci/ignore_build_warnings.txt @@ -23,6 +23,7 @@ warning: unknown kconfig symbol 'BTDM_CTRL_MODE_BTDM' assigned to* warning: unknown kconfig symbol 'CTRL_BTDM_MODEM_SLEEP' assigned to* warning: unknown kconfig symbol 'ESP_DEFAULT_CPU_FREQ_MHZ_80' assigned to 'y' in .*/examples/system/deep_sleep/* warning: unknown kconfig symbol 'ESP_DEFAULT_CPU_FREQ_MHZ_80' assigned to 'y' in .*/examples/system/light_sleep/* +warning: unknown kconfig symbol 'ESP_DEFAULT_CPU_FREQ_MHZ_80' assigned to 'y' in .*/examples/wifi/power_save/* warning: unknown kconfig symbol 'ESP32_REV_MIN_3' assigned to 'y' in .*/examples/system/ota/simple_ota_example/sdkconfig.ci.on_update_no_sb_rsa warning: unknown kconfig symbol 'ESP32_REV_MIN' assigned to '3' in .*/examples/system/ota/simple_ota_example/sdkconfig.ci.on_update_no_sb_rsa warning: unknown kconfig symbol 'ESP32H4_RTC_CLK_CAL_CYCLES' assigned to '576' in .*/examples/bluetooth/nimble/blecent/sdkconfig.defaults.esp32h4 From 0c1394214f8ea9bd08e42fd2ef39ed15979204e8 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Mon, 1 Jun 2026 20:54:41 +0800 Subject: [PATCH 11/16] fix(ci): fix pre-commit issue --- components/esp_wifi/test_apps/bin_size_apsta/README.md | 4 ++-- components/esp_wifi/test_apps/nan_crypto_test/README.md | 4 ++-- components/esp_wifi/test_apps/wifi_connect/README.md | 4 ++-- components/esp_wifi/test_apps/wifi_function/README.md | 4 ++-- components/esp_wifi/test_apps/wifi_nvs_config/README.md | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/components/esp_wifi/test_apps/bin_size_apsta/README.md b/components/esp_wifi/test_apps/bin_size_apsta/README.md index 44f3780f1d6..de83df56df5 100644 --- a/components/esp_wifi/test_apps/bin_size_apsta/README.md +++ b/components/esp_wifi/test_apps/bin_size_apsta/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | diff --git a/components/esp_wifi/test_apps/nan_crypto_test/README.md b/components/esp_wifi/test_apps/nan_crypto_test/README.md index 61864a63265..2555219da26 100644 --- a/components/esp_wifi/test_apps/nan_crypto_test/README.md +++ b/components/esp_wifi/test_apps/nan_crypto_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | # NAN Crypto Test Application diff --git a/components/esp_wifi/test_apps/wifi_connect/README.md b/components/esp_wifi/test_apps/wifi_connect/README.md index 44f3780f1d6..de83df56df5 100644 --- a/components/esp_wifi/test_apps/wifi_connect/README.md +++ b/components/esp_wifi/test_apps/wifi_connect/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | diff --git a/components/esp_wifi/test_apps/wifi_function/README.md b/components/esp_wifi/test_apps/wifi_function/README.md index e0c2bb1e27e..a1466d0f379 100644 --- a/components/esp_wifi/test_apps/wifi_function/README.md +++ b/components/esp_wifi/test_apps/wifi_function/README.md @@ -1,3 +1,3 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | diff --git a/components/esp_wifi/test_apps/wifi_nvs_config/README.md b/components/esp_wifi/test_apps/wifi_nvs_config/README.md index 44f3780f1d6..de83df56df5 100644 --- a/components/esp_wifi/test_apps/wifi_nvs_config/README.md +++ b/components/esp_wifi/test_apps/wifi_nvs_config/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-S2 | ESP32-S3 | ESP32-S31 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | --------- | From f7a2fc94a6c3d55c49d467cf947efab3a477ced4 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Fri, 5 Jun 2026 12:02:50 +0800 Subject: [PATCH 12/16] feat(pm): select XTAL for HP dig_sysclk in modem state On ESP32-S31, SOC and modem APB are decoupled, so the digital system can run from XTAL while the modem domain stays in modem state. --- components/esp_hw_support/port/esp32s31/pmu_param.c | 1 + components/esp_hw_support/port/esp32s31/pmu_sleep.c | 5 ----- components/esp_hw_support/sleep_modes.c | 2 +- components/soc/esp32s31/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32s31/include/soc/soc_caps.h | 2 ++ 5 files changed, 8 insertions(+), 6 deletions(-) diff --git a/components/esp_hw_support/port/esp32s31/pmu_param.c b/components/esp_hw_support/port/esp32s31/pmu_param.c index a20d9af13ae..66ef22d2dde 100644 --- a/components/esp_hw_support/port/esp32s31/pmu_param.c +++ b/components/esp_hw_support/port/esp32s31/pmu_param.c @@ -150,6 +150,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod .icg_sysclk_en = 1, \ .sysclk_slp_sel = 1, \ .icg_slp_sel = 1, \ + /* Default: dig_sysclk uses XTAL. For PLL, update divider coeffs and release PLL lock. */ \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } diff --git a/components/esp_hw_support/port/esp32s31/pmu_sleep.c b/components/esp_hw_support/port/esp32s31/pmu_sleep.c index 0c07af6511e..7d7be1e5797 100644 --- a/components/esp_hw_support/port/esp32s31/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32s31/pmu_sleep.c @@ -330,11 +330,6 @@ static void pmu_sleep_param_init(pmu_context_t *ctx, const pmu_sleep_param_confi pmu_ll_set_pll_stable_wait_cycle(ctx->hal->dev, param->hp_sys.pll_stable_wait_cycle); } -bool pmu_sleep_pll_already_enabled(void) -{ - return (pmu_ll_get_sysclk_sleep_select_state(PMU_instance()->hal->dev) != 0); -} - void pmu_sleep_init(const pmu_sleep_config_t *config, bool dslp) { assert(PMU_instance()); diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 239fbf76cf3..4242bcd2ea9 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -1182,7 +1182,7 @@ static esp_err_t SLEEP_FN_ATTR esp_sleep_start(uint32_t sleep_flags, uint32_t cl } #endif // Restore CPU frequency -#if SOC_PM_SUPPORT_PMU_MODEM_STATE && !SOC_PM_BBPLL_PD_IN_MODEM_STATE +#if SOC_PM_SUPPORT_PMU_MODEM_STATE && !SOC_PM_BBPLL_PD_IN_MODEM_STATE && !SOC_PM_MODEM_STATE_USE_XTAL if (pmu_sleep_pll_already_enabled()) { rtc_clk_cpu_freq_to_pll_and_pll_lock_release(esp_pm_impl_get_cpu_freq(PM_MODE_CPU_MAX)); } else diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index bb5607d56f9..44d2f9a7492 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1547,6 +1547,10 @@ config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y +config SOC_PM_MODEM_STATE_USE_XTAL + bool + default y + config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED bool default y diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index 28cedcd7561..f7f25426e87 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -574,6 +574,8 @@ #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1) #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE +/* Since SOC APB and MODEM APB on ESP32-S31 are decoupled, XTAL can be used as SOC clock in modem state */ +#define SOC_PM_MODEM_STATE_USE_XTAL (1) /* * min_slp_val is derived from slow clock period (450us / slow_clk). From cb306506c899ca760459c8f85deb674cdf060fb1 Mon Sep 17 00:00:00 2001 From: yinqingzhao Date: Tue, 9 Jun 2026 16:16:15 +0800 Subject: [PATCH 13/16] feat(wifi): optimizations ralated to keep alive --- components/esp_wifi/lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index f428c31dc56..1cea9447755 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit f428c31dc5602970d0f6eed02e610589b6c2f622 +Subproject commit 1cea9447755ed443ae064fc23d3959203bb03690 From ced2dcf7484bf333bc4f6ecf6eebef2d376e9733 Mon Sep 17 00:00:00 2001 From: yinqingzhao Date: Tue, 2 Jun 2026 14:23:35 +0800 Subject: [PATCH 14/16] fix(wifi): fix scheduling issue when tasks have the same priority as the Wi-Fi task --- components/esp_rom/esp32c2/ld/esp32c2.rom.ld | 2 +- components/esp_rom/esp32c3/ld/esp32c3.rom.ld | 2 +- components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld | 2 +- components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld | 2 +- components/esp_rom/esp32c61/ld/esp32c61.rom.pp.ld | 2 +- components/esp_rom/esp32s3/ld/esp32s3.rom.ld | 2 +- components/esp_rom/esp32s31/ld/esp32s31.rom.pp.ld | 2 +- components/esp_wifi/lib | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld index 4b26bffcc9d..26db884e98f 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld @@ -579,7 +579,7 @@ ppTxProtoProc = 0x40001c4c; ppTxqUpdateBitmap = 0x40001c50; /*pp_coex_tx_request = 0x40001c54;*/ pp_hdrsize = 0x40001c58; -pp_post = 0x40001c5c; +//pp_post = 0x40001c5c; pp_process_hmac_waiting_txq = 0x40001c60; rcGetAmpduSched = 0x40001c64; rcUpdateRxDone = 0x40001c68; diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld index e89568a3d43..5ef756f3b3f 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld @@ -764,7 +764,7 @@ ppTxProtoProc = 0x40001728; ppTxqUpdateBitmap = 0x4000172c; /*pp_coex_tx_request = 0x40001730;*/ pp_hdrsize = 0x40001734; -pp_post = 0x40001738; +//pp_post = 0x40001738; pp_process_hmac_waiting_txq = 0x4000173c; rcGetAmpduSched = 0x40001740; rcUpdateRxDone = 0x40001744; diff --git a/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld b/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld index ac40d0e98b0..d710b70b722 100644 --- a/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld +++ b/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld @@ -197,7 +197,7 @@ ppTxProtoProc = 0x40000eac; ppTxqUpdateBitmap = 0x40000eb0; pp_coex_tx_request = 0x40000eb4; pp_hdrsize = 0x40000eb8; -pp_post = 0x40000ebc; +//pp_post = 0x40000ebc; pp_process_hmac_waiting_txq = 0x40000ec0; ppDequeueTxDone_Locked = 0x40000ec4; ppProcTxDone = 0x40000ec8; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld index 60646765e00..64562e8b4b5 100644 --- a/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld @@ -113,7 +113,7 @@ ppTxProtoProc = 0x40000d44; ppTxqUpdateBitmap = 0x40000d48; /*pp_coex_tx_request = 0x40000d4c;*/ pp_hdrsize = 0x40000d50; -pp_post = 0x40000d54; +//pp_post = 0x40000d54; pp_process_hmac_waiting_txq = 0x40000d58; rcGetAmpduSched = 0x40000d5c; rcUpdateRxDone = 0x40000d60; diff --git a/components/esp_rom/esp32c61/ld/esp32c61.rom.pp.ld b/components/esp_rom/esp32c61/ld/esp32c61.rom.pp.ld index 62773b03b06..56dd3a26ef7 100644 --- a/components/esp_rom/esp32c61/ld/esp32c61.rom.pp.ld +++ b/components/esp_rom/esp32c61/ld/esp32c61.rom.pp.ld @@ -197,7 +197,7 @@ ppTxProtoProc = 0x40000e24; ppTxqUpdateBitmap = 0x40000e28; pp_coex_tx_request = 0x40000e2c; pp_hdrsize = 0x40000e30; -pp_post = 0x40000e34; +//pp_post = 0x40000e34; pp_process_hmac_waiting_txq = 0x40000e38; ppDequeueTxDone_Locked = 0x40000e3c; ppProcTxDone = 0x40000e40; diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld index bea929edd98..2b9b441d211 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld @@ -1019,7 +1019,7 @@ ppTxProtoProc = 0x400056b8; ppTxqUpdateBitmap = 0x400056c4; /*pp_coex_tx_request = 0x400056d0;*/ pp_hdrsize = 0x400056dc; -pp_post = 0x400056e8; +//pp_post = 0x400056e8; pp_process_hmac_waiting_txq = 0x400056f4; rcGetAmpduSched = 0x40005700; rcUpdateRxDone = 0x4000570c; diff --git a/components/esp_rom/esp32s31/ld/esp32s31.rom.pp.ld b/components/esp_rom/esp32s31/ld/esp32s31.rom.pp.ld index 199ae475d84..b2f02c60683 100644 --- a/components/esp_rom/esp32s31/ld/esp32s31.rom.pp.ld +++ b/components/esp_rom/esp32s31/ld/esp32s31.rom.pp.ld @@ -196,7 +196,7 @@ ppTxProtoProc = 0x2f800fc8; ppTxqUpdateBitmap = 0x2f800fcc; pp_coex_tx_request = 0x2f800fd0; pp_hdrsize = 0x2f800fd4; -pp_post = 0x2f800fd8; +//pp_post = 0x2f800fd8; pp_process_hmac_waiting_txq = 0x2f800fdc; ppDequeueTxDone_Locked = 0x2f800fe0; ppProcTxDone = 0x2f800fe4; diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index 1cea9447755..26dc038ab2b 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit 1cea9447755ed443ae064fc23d3959203bb03690 +Subproject commit 26dc038ab2bc3b4ff00d3a25261d04078e32ff61 From 2259b507aa1cc11bb1017b8b8f559fcf66e0c903 Mon Sep 17 00:00:00 2001 From: yinqingzhao Date: Wed, 10 Jun 2026 19:57:21 +0800 Subject: [PATCH 15/16] feat(wifi): support ftm for esp32s31 --- components/esp_wifi/lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index 26dc038ab2b..e54196faa03 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit 26dc038ab2bc3b4ff00d3a25261d04078e32ff61 +Subproject commit e54196faa039e7836847a2920da749e4abbb3d96 From 3d5a57196651f60de9cbe780dc164274fbd5e98f Mon Sep 17 00:00:00 2001 From: yinqingzhao Date: Wed, 10 Jun 2026 20:17:23 +0800 Subject: [PATCH 16/16] fix(itwt): fix flow id 0 cannot suspend in itwt example --- examples/wifi/itwt/main/wifi_itwt_cmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/wifi/itwt/main/wifi_itwt_cmd.c b/examples/wifi/itwt/main/wifi_itwt_cmd.c index 157a88ef067..3975d79c40c 100644 --- a/examples/wifi/itwt/main/wifi_itwt_cmd.c +++ b/examples/wifi/itwt/main/wifi_itwt_cmd.c @@ -144,7 +144,7 @@ static int wifi_cmd_itwt(int argc, char **argv) bool all_twt = itwt_args.all_twt->count ? (itwt_args.all_twt->ival[0] ? true : false) : false; flow_id = (all_twt == true) ? FLOW_ID_ALL : flow_id; int suspend_time_ms = itwt_args.suspend_time_ms->count ? itwt_args.suspend_time_ms->ival[0] : 0; - if (flow_id > 0) { + if (flow_id >= 0) { err = esp_wifi_sta_itwt_suspend(flow_id, suspend_time_ms); ESP_LOGI(TAG, "(itwt)suspend, flow_id:%d, all_twt:%d, suspend:%d ms, err:0x%x", flow_id, all_twt, suspend_time_ms, err); } else {