diff --git a/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c b/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
index 292ac043642..cc62ad90e15 100644
--- a/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
+++ b/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
@@ -308,17 +308,17 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
 #if SOC_EFUSE_ECDSA_KEY
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
 #endif
-#if SOC_EFUSE_ECDSA_KEY_P192
+#if SOC_EFUSE_ECDSA_KEY_P192 || EFUSE_LL_HAS_ECDSA_KEY_P192
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P192 ||
 #endif
-#if SOC_EFUSE_ECDSA_KEY_P384
+#if SOC_EFUSE_ECDSA_KEY_P384 || EFUSE_LL_HAS_ECDSA_KEY_P384
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_L ||
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_H ||
 #endif
-#if SOC_PSRAM_ENCRYPTION_XTS_AES_128
+#if SOC_PSRAM_ENCRYPTION_XTS_AES_128 || EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_128
             purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_PSRAM_KEY ||
 #endif
-#if SOC_PSRAM_ENCRYPTION_XTS_AES_256
+#if SOC_PSRAM_ENCRYPTION_XTS_AES_256 || EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_256
             purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_1 ||
             purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_2 ||
 #endif
diff --git a/components/efuse/test_apps/main/with_key_purposes/test_efuse_keys.c b/components/efuse/test_apps/main/with_key_purposes/test_efuse_keys.c
index c27d3d59b74..afed6dd1d76 100644
--- a/components/efuse/test_apps/main/with_key_purposes/test_efuse_keys.c
+++ b/components/efuse/test_apps/main/with_key_purposes/test_efuse_keys.c
@@ -14,6 +14,7 @@
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 #include "esp_efuse_utility.h"
+#include "hal/efuse_ll.h"
 #include "sdkconfig.h"
 
 __attribute__((unused)) static const char* TAG = "efuse_key_test";
@@ -93,17 +94,17 @@ static esp_err_t s_check_key(esp_efuse_block_t num_key, void* wr_key)
 #if SOC_EFUSE_ECDSA_KEY
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
 #endif
-#if SOC_EFUSE_ECDSA_KEY_P192
+#if SOC_EFUSE_ECDSA_KEY_P192 || EFUSE_LL_HAS_ECDSA_KEY_P192
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P192 ||
 #endif
-#if SOC_EFUSE_ECDSA_KEY_P384
+#if SOC_EFUSE_ECDSA_KEY_P384 || EFUSE_LL_HAS_ECDSA_KEY_P384
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_L ||
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_H ||
 #endif
-#if SOC_PSRAM_ENCRYPTION_XTS_AES_128
+#if SOC_PSRAM_ENCRYPTION_XTS_AES_128 || EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_128
             purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_PSRAM_KEY ||
 #endif
-#if SOC_PSRAM_ENCRYPTION_XTS_AES_256
+#if SOC_PSRAM_ENCRYPTION_XTS_AES_256 || EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_256
             purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_1 ||
             purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_2 ||
 #endif
diff --git a/components/efuse/test_apps/pytest_efuse.py b/components/efuse/test_apps/pytest_efuse.py
index 0826ecb9c59..7d9c5367359 100644
--- a/components/efuse/test_apps/pytest_efuse.py
+++ b/components/efuse/test_apps/pytest_efuse.py
@@ -6,7 +6,7 @@ from pytest_embedded_idf.utils import idf_parametrize
 
 
 @pytest.mark.temp_skip_ci(
-    targets=['esp32s2', 'esp32s3', 'esp32p4'],
+    targets=['esp32s2', 'esp32s3'],
     reason='eFuse for S2 and S3 is similar to the C3 chip, so testing on C3 is enough',
 )
 @pytest.mark.generic
diff --git a/components/hal/esp32p4/include/hal/efuse_ll.h b/components/hal/esp32p4/include/hal/efuse_ll.h
index b2d6223ff47..fe250fa555d 100644
--- a/components/hal/esp32p4/include/hal/efuse_ll.h
+++ b/components/hal/esp32p4/include/hal/efuse_ll.h
@@ -13,6 +13,7 @@
 #include "rom/efuse.h"
 #include "hal/ecdsa_types.h"
 #include "hal/ecdsa_ll.h"
+#include "hal/config.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -27,6 +28,25 @@ typedef enum {
     EFUSE_CONTROLLER_STATE_READ_RS_BLK      = 5,    ///< efuse_controllerid is on reading RS block state.
 } efuse_controller_state_t;
 
+/* Revision-aware eFuse feature macros
+ *
+ * These macros indicate whether an eFuse feature is available given the
+ * configured minimum supported chip revision (HAL_CONFIG(CHIP_SUPPORT_MIN_REV)).
+ * Use them when a feature's presence depends on the chosen minimum revision.
+ *
+ * Note: SOC_* capability macros describe silicon capabilities; these
+ * EFUSE_LL_HAS_* macros reflect availability relative to the configured min revision.
+ * If a feature is present in silicon and does not depend on the chip revision,
+ * then add SOC_* macro in soc_caps.h instead.
+ */
+#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
+// Rev 3.00+: key_purpose fields expanded from 4 to 5 bits, enabling additional key types.
+#define EFUSE_LL_HAS_ECDSA_KEY_P192    (1)
+#define EFUSE_LL_HAS_ECDSA_KEY_P384    (1)
+#define EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_128  (1)
+#define EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_256  (1)
+#endif
+
 // Always inline these functions even no gcc optimization is applied.
 
 /******************* eFuse fields *************************/