Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 03:00:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

modem clock: gatable clock interface which can gate or ungate modem clock domain

Browse Source
This commit is contained in:
Li Shuai
2023-07-13 20:44:56 +08:00
parent 7ec38eb309
commit 9950b6a527
6 changed files with 164 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/include/esp_private/esp_modem_clock.h
+28
View File
@@ -10,9 +10,11 @@
#include <stddef.h>
#include <stdint.h>
#include "esp_err.h"
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "hal/modem_clock_types.h"
#include "esp_private/esp_pmu.h"
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
#include "hal/modem_clock_hal.h"
@@ -77,6 +79,32 @@ void modem_clock_module_mac_reset(periph_module_t module);
*/
void modem_clock_domain_pmu_state_icg_map_init(void);
#if SOC_PMU_SUPPORTED
/**
* @brief Enable modem clock domain clock gate to gate it's output
*
* @param domain modem module clock domain
* @param mode PMU HP system ACTIVE, MODEM and SLEEP state
*
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if the argument value are not correct
*/
esp_err_t modem_clock_domain_clk_gate_enable(modem_clock_domain_t domain, pmu_hp_icg_modem_mode_t mode);
/**
* @brief Disable modem clock domain clock gate to ungate it's output
*
* @param domain modem module clock domain
* @param mode PMU HP system ACTIVE, MODEM and SLEEP state
*
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if the argument value are not correct
*/
esp_err_t modem_clock_domain_clk_gate_disable(modem_clock_domain_t domain, pmu_hp_icg_modem_mode_t mode);
#endif
/**
* @brief Select the modem module lowpower clock source and configure the clock divider
*
components/esp_hw_support/modem_clock.c
+32
View File
@@ -180,6 +180,38 @@ void modem_clock_domain_pmu_state_icg_map_init(void)
{
modem_clock_domain_power_state_icg_map_init(MODEM_CLOCK_instance());
}
esp_err_t modem_clock_domain_clk_gate_enable(modem_clock_domain_t domain, pmu_hp_icg_modem_mode_t mode)
{
if (domain >= MODEM_CLOCK_DOMAIN_MAX || domain < MODEM_CLOCK_DOMAIN_MODEM_APB) {
return ESP_ERR_INVALID_ARG;
}
if (mode > PMU_HP_ICG_MODEM_CODE_ACTIVE || mode < PMU_HP_ICG_MODEM_CODE_SLEEP) {
return ESP_ERR_INVALID_ARG;
}
portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
uint32_t code = modem_clock_hal_get_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain);
modem_clock_hal_set_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain, (code & ~BIT(mode)));
portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
return ESP_OK;
}
esp_err_t modem_clock_domain_clk_gate_disable(modem_clock_domain_t domain, pmu_hp_icg_modem_mode_t mode)
{
if (domain >= MODEM_CLOCK_DOMAIN_MAX || domain < MODEM_CLOCK_DOMAIN_MODEM_APB) {
return ESP_ERR_INVALID_ARG;
}
if (mode > PMU_HP_ICG_MODEM_CODE_ACTIVE || mode < PMU_HP_ICG_MODEM_CODE_SLEEP) {
return ESP_ERR_INVALID_ARG;
}
portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
uint32_t code = modem_clock_hal_get_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain);
modem_clock_hal_set_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain, (code | BIT(mode)));
portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
return ESP_OK;
}
#endif // #if SOC_PM_SUPPORT_PMU_MODEM_STATE
static void IRAM_ATTR modem_clock_device_enable(modem_clock_context_t *ctx, uint32_t dev_map)