From 990cc666a6fe4141d204a0d9506adc64c02f2b40 Mon Sep 17 00:00:00 2001 From: "harshal.patil" Date: Wed, 19 Aug 2026 13:30:14 +0530 Subject: [PATCH] test(mbedtls): add partial-block PSRAM coverage for AES Extend the CTR test data length to 6433 bytes so the trailing partial block is exercised with external RAM buffers (which stalls the ESP32-S2 Crypto DMA on an unfixed driver). --- components/mbedtls/test_apps/main/test_aes.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/components/mbedtls/test_apps/main/test_aes.c b/components/mbedtls/test_apps/main/test_aes.c index c73256e8d72..53d6b19221b 100644 --- a/components/mbedtls/test_apps/main/test_aes.c +++ b/components/mbedtls/test_apps/main/test_aes.c @@ -839,10 +839,10 @@ TEST_CASE("mbedtls OFB, chained DMA descriptors", "[aes]") const uint8_t expected_cipher_ctr_end[] = { - 0x93, 0xca, 0xe0, 0x44, 0x96, 0x6d, 0xcb, 0xb2, - 0xcf, 0x8a, 0x8d, 0x73, 0x8c, 0x6b, 0xfa, 0x4d, - 0xd6, 0xc4, 0x18, 0x49, 0xdd, 0xc6, 0xbf, 0xc2, - 0xb9, 0xf0, 0x09, 0x69, 0x45, 0x42, 0xc6, 0x05, + 0x42, 0xf6, 0x3b, 0x8e, 0x11, 0x43, 0xc8, 0xc7, + 0xd9, 0x85, 0xf3, 0xdc, 0x39, 0x6b, 0x33, 0x98, + 0x8c, 0xc0, 0xf5, 0x92, 0xb4, 0x04, 0xf9, 0x2f, + 0xdf, 0x12, 0xc0, 0xa1, 0xd2, 0xdc, 0x71, 0x88, }; @@ -852,7 +852,7 @@ void aes_ctr_alignment_test(uint32_t input_buf_caps, uint32_t output_buf_caps) uint8_t nonce[16]; uint8_t key[16]; uint8_t stream_block[16]; - size_t SZ = 32*200; + size_t SZ = 32*200 + 33; size_t ALIGNMENT_SIZE_BYTES = 64; memset(nonce, 0x2F, 16); memset(key, 0x1E, 16); @@ -911,7 +911,7 @@ void aes_psram_one_buf_ctr_test(void) uint8_t nonce[16]; uint8_t key[16]; uint8_t stream_block[16]; - size_t SZ = 32*200; + size_t SZ = 32*200 + 33; size_t ALIGNMENT_SIZE_BYTES = 32; memset(nonce, 0x2F, 16); memset(key, 0x1E, 16);