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Merge branch 'feature/esp32c5_mp_gpio_support_v5.3' into 'release/v5.3'
Feature/esp32c5 mp gpio support (v5.3) See merge request espressif/esp-idf!30884
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@@ -6,6 +6,7 @@
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#include <string.h>
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#include "soc/uart_reg.h"
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#include "soc/gpio_periph.h"
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#include "soc/uart_pins.h"
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#include "driver/gpio.h"
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#include "hal/gpio_hal.h"
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#include "esp_core_dump_types.h"
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@@ -147,17 +148,15 @@ static esp_err_t esp_core_dump_uart_hw_init(void)
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uint32_t tm_cur = 0;
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int ch = 0;
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// TODO: move chip dependent code to portable part
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gpio_hal_context_t gpio_hal = {
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.dev = GPIO_HAL_GET_HW(GPIO_PORT_0)
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};
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//Make sure txd/rxd are enabled
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// use direct reg access instead of gpio_pullup_dis which can cause exception when flash cache is disabled
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REG_CLR_BIT(GPIO_PIN_REG_1, FUN_PU);
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#if CONFIG_IDF_TARGET_ESP32P4
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gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U_PAD_GPIO38, FUNC_GPIO38_UART0_RXD_PAD);
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gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U_PAD_GPIO37, FUNC_GPIO37_UART0_TXD_PAD);
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#else
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gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
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gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
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#endif
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REG_CLR_BIT(GPIO_PIN_REG_1, FUN_PU); //TODO: IDF-9948
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gpio_hal_func_sel(&gpio_hal, U0RXD_GPIO_NUM, U0RXD_MUX_FUNC);
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gpio_hal_func_sel(&gpio_hal, U0TXD_GPIO_NUM, U0TXD_MUX_FUNC);
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ESP_COREDUMP_LOGI("Press Enter to print core dump to UART...");
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const int cpu_ticks_per_ms = esp_clk_cpu_freq() / 1000;
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tm_end = esp_cpu_get_cycle_count() / cpu_ticks_per_ms + CONFIG_ESP_COREDUMP_UART_DELAY;
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