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fix(mpll): improved mpll calibration flow on esp32s31

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Signed-off-by: Armando (Dou Yiwen) <douyiwen@espressif.com>
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Armando (Dou Yiwen)
2026-08-24 09:34:36 +08:00
parent a9de6a4f30
commit 9726078b55
4 changed files with 68 additions and 26 deletions
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components/bootloader_support/src/esp32s31/bootloader_esp32s31.c
+3 -2
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@@ -57,8 +57,9 @@ static inline void bootloader_hardware_init(void)
regi2c_ctrl_ll_master_configure_clock();
#endif
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1, 10);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
REGI2C_WRITE_MASK(I2C_MPLL, I2C_MPLL_IR_CAL_EXT_CAP, 3);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1, 12);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 12);
/* During mmu_hal_init, a valid clock source is required for the PSRAM,
so before shutting down MPLL in rtc_clk_init, the PSRAM clock source