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Merge branch 'test/peripheral_drivers_on_real_encryption_runner_v6.1' into 'release/v6.1'

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test(drivers): run flash encryption apps on real hardware (v6.1)

See merge request espressif/esp-idf!50675
This commit is contained in:
morris
2026-07-29 18:52:19 +08:00
parent 8f2ac25de4 13282c44b0
commit 967f047b62
45 changed files with 252 additions and 545 deletions
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components/esp_driver_dma/test_apps/dma/main/gdma_test_utils.h
+11 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -7,8 +7,18 @@
#pragma once
#include <stdbool.h>
#include "sdkconfig.h"
#include "esp_private/gdma.h"
#if CONFIG_IDF_TARGET_ESP32S31
// ESP32-S31 LP AHB GDMA can't burst-access external PSRAM. Skip the
// flash-encrypted PSRAM test paths because encrypted PSRAM requires burst
// accesses aligned to the encryption block size.
#define GDMA_TEST_LP_AHB_BURST_PSRAM_SUPPORTED 0
#else
#define GDMA_TEST_LP_AHB_BURST_PSRAM_SUPPORTED 1
#endif
#ifdef __cplusplus
extern "C" {
#endif
components/esp_driver_dma/test_apps/dma/main/test_async_memcpy.c
+9 -4
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@@ -18,6 +18,7 @@
#include "esp_async_memcpy.h"
#include "hal/efuse_hal.h"
#include "esp_efuse.h"
#include "gdma_test_utils.h"
#if SOC_GDMA_SUPPORTED
#include "hal/gdma_ll.h"
@@ -425,10 +426,14 @@ TEST_CASE("memory copy performance 40KB: PSRAM->PSRAM", "[async mcp]")
#if SOC_HAS(LP_AHB_GDMA)
#if GDMA_LL_GET(LP_AHB_PSRAM_CAPABLE)
printf("Testing memcpy by LP AHB GDMA\r\n");
TEST_ESP_OK(esp_async_memcpy_install_gdma_lp_ahb(&driver_config, &driver));
test_memcpy_performance(driver, 40 * 1024, true, true);
TEST_ESP_OK(esp_async_memcpy_uninstall(driver));
if (esp_efuse_is_flash_encryption_enabled() && !GDMA_TEST_LP_AHB_BURST_PSRAM_SUPPORTED) {
TEST_IGNORE_MESSAGE("Skipping LP AHB GDMA PSRAM->PSRAM under flash encryption");
} else {
printf("Testing memcpy by LP AHB GDMA\r\n");
TEST_ESP_OK(esp_async_memcpy_install_gdma_lp_ahb(&driver_config, &driver));
test_memcpy_performance(driver, 40 * 1024, true, true);
TEST_ESP_OK(esp_async_memcpy_uninstall(driver));
}
#endif // GDMA_LL_GET(LP_AHB_PSRAM_CAPABLE)
#endif // SOC_HAS(LP_AHB_GDMA)
}
components/esp_driver_dma/test_apps/dma/main/test_gdma.c
+22 -9
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@@ -401,6 +401,7 @@ static void test_gdma_m2m_mode(bool trig_retention_backup)
gdma_channel_alloc_config_t chan_alloc_config = {};
#if SOC_HAS(AHB_GDMA)
printf("Testing GDMA M2M Mode by AHB GDMA%s\n", trig_retention_backup ? " with retention backup" : "");
TEST_ESP_OK(gdma_new_ahb_channel(&chan_alloc_config, &tx_chan, &rx_chan));
test_gdma_m2m_transaction(tx_chan, rx_chan, false, trig_retention_backup);
@@ -410,6 +411,7 @@ static void test_gdma_m2m_mode(bool trig_retention_backup)
#endif // SOC_HAS(AHB_GDMA)
#if SOC_HAS(AXI_GDMA)
printf("Testing GDMA M2M Mode by AXI GDMA%s\n", trig_retention_backup ? " with retention backup" : "");
TEST_ESP_OK(gdma_new_axi_channel(&chan_alloc_config, &tx_chan, &rx_chan));
bool lli_in_ext_mem = false;
@@ -424,12 +426,17 @@ static void test_gdma_m2m_mode(bool trig_retention_backup)
#endif // SOC_HAS(AXI_GDMA)
#if SOC_HAS(LP_AHB_GDMA)
TEST_ESP_OK(gdma_new_lp_ahb_channel(&chan_alloc_config, &tx_chan, &rx_chan));
if (esp_efuse_is_flash_encryption_enabled() && !GDMA_TEST_LP_AHB_BURST_PSRAM_SUPPORTED) {
TEST_IGNORE_MESSAGE("Skip LP-AHB-GDMA GDMA M2M Mode under flash encryption");
} else {
printf("Testing GDMA M2M Mode by LP-AHB GDMA%s\n", trig_retention_backup ? " with retention backup" : "");
TEST_ESP_OK(gdma_new_lp_ahb_channel(&chan_alloc_config, &tx_chan, &rx_chan));
test_gdma_m2m_transaction(tx_chan, rx_chan, false, trig_retention_backup);
test_gdma_m2m_transaction(tx_chan, rx_chan, false, trig_retention_backup);
TEST_ESP_OK(gdma_del_channel(tx_chan));
TEST_ESP_OK(gdma_del_channel(rx_chan));
TEST_ESP_OK(gdma_del_channel(tx_chan));
TEST_ESP_OK(gdma_del_channel(rx_chan));
}
#endif // SOC_HAS(LP_AHB_GDMA)
}
@@ -839,13 +846,19 @@ TEST_CASE("GDMA memory copy SRAM->PSRAM->SRAM", "[GDMA][M2M]")
#endif // SOC_HAS(AXI_GDMA)
#if SOC_HAS(LP_AHB_GDMA)
printf("Testing LP-AHB-GDMA memory copy SRAM->PSRAM->SRAM\n");
TEST_ESP_OK(gdma_new_lp_ahb_channel(&chan_alloc_config, &tx_chan, &rx_chan));
#if GDMA_LL_GET(LP_AHB_PSRAM_CAPABLE)
if (esp_efuse_is_flash_encryption_enabled() && !GDMA_TEST_LP_AHB_BURST_PSRAM_SUPPORTED) {
TEST_IGNORE_MESSAGE("Skipping LP-AHB-GDMA SRAM->PSRAM->SRAM under flash encryption");
} else {
printf("Testing LP-AHB-GDMA memory copy SRAM->PSRAM->SRAM\n");
TEST_ESP_OK(gdma_new_lp_ahb_channel(&chan_alloc_config, &tx_chan, &rx_chan));
test_gdma_memcpy_from_to_psram(tx_chan, rx_chan);
test_gdma_memcpy_from_to_psram(tx_chan, rx_chan);
TEST_ESP_OK(gdma_del_channel(tx_chan));
TEST_ESP_OK(gdma_del_channel(rx_chan));
TEST_ESP_OK(gdma_del_channel(tx_chan));
TEST_ESP_OK(gdma_del_channel(rx_chan));
}
#endif // GDMA_LL_GET(LP_AHB_PSRAM_CAPABLE)
#endif // SOC_HAS(LP_AHB_GDMA)
}
#endif // SOC_SPIRAM_SUPPORTED
components/esp_driver_dma/test_apps/dma/pytest_dma.py
+11 -1
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@@ -71,7 +71,17 @@ def test_dma_weighted_arbitration(dut: Dut) -> None:
],
indirect=True,
)
@idf_parametrize('target', ['esp32p4', 'esp32c5'], indirect=['target'])
@idf_parametrize(
'target',
soc_filtered_targets(
'SOC_GDMA_SUPPORTED == 1 and '
'SOC_PSRAM_DMA_CAPABLE == 1 and '
'SOC_FLASH_ENC_SUPPORTED == 1 and '
'IDF_TARGET not in ["esp32s3"]'
),
indirect=['target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32h4', 'esp32c61'], reason='no runner yet')
def test_dma_flash_encryption(dut: Dut) -> None:
dut.run_all_single_board_cases()