Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 03:00:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

fix(intr_alloc): Fix ISR allocate methods in several drivers

Browse Source
This commit is contained in:
Chen Chen
2026-01-07 10:17:09 +08:00
parent 27377d267b
commit 94f9f086f9
37 changed files with 265 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/hal/esp32s2/include/hal/cache_ll.h
+2 -1
View File
@@ -282,7 +282,8 @@ static inline void cache_ll_resume_cache(uint32_t cache_level, cache_type_t type
* @return true: enabled; false: disabled
*/
__attribute__((always_inline))
static inline bool cache_ll_l1_is_icache_enabled(uint32_t cache_id){
static inline bool cache_ll_l1_is_icache_enabled(uint32_t cache_id)
{
HAL_ASSERT(cache_id <= CACHE_LL_ID_ALL);
bool enabled;
components/hal/esp32s2/include/hal/ledc_ll.h
+14 -1
View File
@@ -27,6 +27,8 @@ extern "C" {
#define LEDC_LL_HPOINT_VAL_MAX (LEDC_HPOINT_LSCH0_V)
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
/// Get the mask of the fade end interrupt status register.
#define LEDC_LL_FADE_END_INTR_MASK (0xffUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S)
#define LEDC_LL_GLOBAL_CLOCKS { \
LEDC_SLOW_CLK_APB, \
@@ -527,7 +529,6 @@ static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_m
*
* @param hw Beginning address of the peripheral registers
* @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param intr_status The fade end interrupt status
*
* @return None
@@ -539,6 +540,18 @@ static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t
*intr_status = (value >> int_en_base) & 0xff;
}
/**
* @brief Get the address of the fade end interrupt status register.
*
* @param hw Beginning address of the peripheral registers
* @return Pointer to the fade end interrupt status register.
*/
static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw)
{
return &hw->int_st.val;
}
/**
* @brief Clear fade end interrupt status
*
components/hal/esp32s2/include/hal/uart_ll.h
+5
View File
@@ -256,6 +256,11 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_intsts_mask(uart_dev_t *hw)
return hw->int_st.val;
}
FORCE_INLINE_ATTR volatile void* uart_ll_get_intr_status_reg(uart_dev_t *hw)
{
return &hw->int_st.val;
}
/**
* @brief Clear the UART interrupt status based on the given mask.
*