Merge branch 'bugfix/fix_ram_app_mmu_issue' into 'master'

RAM APP: fixed cannot use external memory correctly issue

Closes IDF-7019 and IDF-7039

See merge request espressif/esp-idf!22682

components/esp_rom/esp32c2/Kconfig.soc_caps.in

@@ -58,3 +58,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y

components/esp_rom/esp32c2/esp_rom_caps.h

@@ -20,3 +20,4 @@
 #define ESP_ROM_HAS_SPI_FLASH               (1) // ROM has the implementation of SPI Flash driver
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init

components/esp_rom/esp32c3/Kconfig.soc_caps.in

@@ -62,3 +62,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y

components/esp_rom/esp32c3/esp_rom_caps.h

@@ -21,3 +21,4 @@
 #define ESP_ROM_HAS_ETS_PRINTF_BUG          (1) // ROM has ets_printf bug when disable the ROM log either by eFuse or RTC storage register
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init

components/esp_rom/esp32c6/Kconfig.soc_caps.in

@@ -74,3 +74,7 @@ config ESP_ROM_WDT_INIT_PATCH
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y

components/esp_rom/esp32c6/esp_rom_caps.h

@@ -24,3 +24,4 @@
 #define ESP_ROM_REV0_HAS_NO_ECDSA_INTERFACE (1) // ECO 0 does not have ets_ecdsa_verify symbol, future revision will have it
 #define ESP_ROM_WDT_INIT_PATCH              (1) // ROM version does not configure the clock
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init

components/esp_rom/esp32h2/Kconfig.soc_caps.in

@@ -62,3 +62,7 @@ config ESP_ROM_WDT_INIT_PATCH
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y

components/esp_rom/esp32h2/esp_rom_caps.h

@@ -21,3 +21,4 @@
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano versions of formatting functions
 #define ESP_ROM_WDT_INIT_PATCH              (1) // ROM version does not configure the clock
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init

components/esp_rom/esp32h4/Kconfig.soc_caps.in

@@ -54,3 +54,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y

components/esp_rom/esp32h4/esp_rom_caps.h

@@ -19,3 +19,4 @@
 #define ESP_ROM_HAS_ETS_PRINTF_BUG          (1) // ROM has ets_printf bug when disable the ROM log either by eFuse or RTC storage register
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init

components/esp_rom/esp32s3/Kconfig.soc_caps.in

@@ -66,3 +66,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y

components/esp_rom/esp32s3/esp_rom_caps.h

@@ -22,3 +22,4 @@
 #define ESP_ROM_HAS_ETS_PRINTF_BUG          (1) // ROM has ets_printf bug when disable the ROM log either by eFuse or RTC storage register
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init

components/esp_rom/include/esp32c2/rom/cache.h

@@ -269,6 +269,15 @@ void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
   */
 void Cache_Get_Mode(struct cache_mode * mode);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing Owner, MMU, setting ICache mode, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Init mmu owner register to make i/d cache use half mmu entries.
   *

components/esp_rom/include/esp32c3/rom/cache.h

@@ -269,6 +269,15 @@ void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
   */
 void Cache_Get_Mode(struct cache_mode * mode);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing Owner, MMU, setting ICache mode, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Init mmu owner register to make i/d cache use half mmu entries.
   *

components/esp_rom/include/esp32c6/rom/cache.h

@@ -165,6 +165,15 @@ extern const cache_op_cb_t* rom_cache_op_cb;
   */
 void Cache_MMU_Init(void);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing MMU, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Set ICache mmu mapping.
   *        Please do not call this function in your SDK application.

components/esp_rom/include/esp32h2/rom/cache.h

@@ -169,6 +169,15 @@ extern const cache_op_cb_t* rom_cache_op_cb;
   */
 void Cache_MMU_Init(void);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing MMU, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Set ICache mmu mapping.
   *        Please do not call this function in your SDK application.

components/esp_rom/include/esp32h4/rom/cache.h

@@ -269,6 +269,15 @@ void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
   */
 void Cache_Get_Mode(struct cache_mode * mode);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing Owner, MMU, setting ICache mode, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Init mmu owner register to make i/d cache use half mmu entries.
   *

components/esp_rom/include/esp32s3/rom/cache.h

@@ -391,6 +391,15 @@ uint32_t Cache_Address_Through_DCache(uint32_t addr);
   *
   * @return None
   */
+void ROM_Boot_Cache_Init(void);
+
+/**
+  * @brief Init mmu owner register to make i/d cache use half mmu entries.
+  *
+  * @param None
+  *
+  * @return None
+  */
 void Cache_Owner_Init(void);
 
 /**