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feat(cpu_region_protect): Enable basic memory protection for SPIRAM

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This commit is contained in:
harshal.patil
2025-05-05 11:52:04 +05:30
parent f77e96e7c6
commit 9406fde68d
21 changed files with 474 additions and 48 deletions
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tools/test_apps/system/panic/main/include/test_memprot.h
+4
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@@ -44,6 +44,10 @@ void test_rtc_slow_reg2_execute_violation(void);
void test_irom_reg_write_violation(void);
void test_spiram_xip_irom_alignment_reg_execute_violation(void);
void test_spiram_xip_drom_alignment_reg_execute_violation(void);
void test_drom_reg_write_violation(void);
void test_drom_reg_execute_violation(void);
tools/test_apps/system/panic/main/test_app_main.c
+11 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -18,6 +18,9 @@
#include "test_panic.h"
#include "test_memprot.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
/* Test Utility Functions */
#define BOOT_CMD_MAX_LEN (128)
@@ -170,6 +173,13 @@ void app_main(void)
HANDLE_TEST(test_name, test_irom_reg_write_violation);
HANDLE_TEST(test_name, test_drom_reg_write_violation);
HANDLE_TEST(test_name, test_drom_reg_execute_violation);
#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && SOC_MMU_DI_VADDR_SHARED
HANDLE_TEST(test_name, test_spiram_xip_irom_alignment_reg_execute_violation);
#endif
#endif
#if CONFIG_SPIRAM_RODATA && !CONFIG_IDF_TARGET_ESP32S2
HANDLE_TEST(test_name, test_spiram_xip_drom_alignment_reg_execute_violation);
#endif
#ifdef CONFIG_SOC_CPU_HAS_PMA
tools/test_apps/system/panic/main/test_memprot.c
+33 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -13,6 +13,7 @@
#include "esp_system.h"
#include "esp_log.h"
#include "soc/soc.h"
#include "soc/soc_caps.h"
#include "test_memprot.h"
#include "sdkconfig.h"
@@ -24,6 +25,8 @@ extern int _iram_start;
extern int _iram_text_start;
extern int _iram_text_end;
#define ALIGN_UP_TO_MMU_PAGE_SIZE(addr) (((addr) + (SOC_MMU_PAGE_SIZE) - 1) & ~((SOC_MMU_PAGE_SIZE) - 1))
/* NOTE: Naming conventions for RTC_FAST_MEM are
* different for ESP32-C3 and other RISC-V targets
*/
@@ -245,8 +248,37 @@ void test_drom_reg_execute_violation(void)
func_ptr = (void(*)(void))foo_buf;
func_ptr();
}
// Check if the memory alignment gaps added to the heap are correctly configured
#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && SOC_MMU_DI_VADDR_SHARED
void test_spiram_xip_irom_alignment_reg_execute_violation(void)
{
extern int _instruction_reserved_end;
if (ALIGN_UP_TO_MMU_PAGE_SIZE((uint32_t)(&_instruction_reserved_end)) - (uint32_t)(&_instruction_reserved_end) >= 4) {
void (*test_addr)(void) = (void(*)(void))((uint32_t)(&_instruction_reserved_end + 0x4));
printf("SPIRAM (IROM): Execute operation | Address: %p\n", test_addr);
test_addr();
} else {
printf("SPIRAM (IROM): IROM alignment gap not added into heap\n");
}
}
#endif /* CONFIG_SPIRAM_FETCH_INSTRUCTIONS && SOC_MMU_DI_VADDR_SHARED */
#endif
#if CONFIG_SPIRAM_RODATA && !CONFIG_IDF_TARGET_ESP32S2
void test_spiram_xip_drom_alignment_reg_execute_violation(void)
{
extern int _rodata_reserved_end;
if (ALIGN_UP_TO_MMU_PAGE_SIZE((uint32_t)(&_rodata_reserved_end)) - (uint32_t)(&_rodata_reserved_end) >= 4) {
void (*test_addr)(void) = (void(*)(void))((uint32_t)(&_rodata_reserved_end + 0x4));
printf("SPIRAM (DROM): Execute operation | Address: %p\n", test_addr);
test_addr();
} else {
printf("SPIRAM (DROM): DROM alignment gap not added into heap\n");
}
}
#endif /* CONFIG_SPIRAM_RODATA && !CONFIG_IDF_TARGET_ESP32S2 */
#ifdef CONFIG_SOC_CPU_HAS_PMA
void test_invalid_memory_region_write_violation(void)
{