refactor(i2s): clean up i2s soc caps

This commit is contained in:
laokaiyao
2025-10-01 21:51:58 +08:00
parent 31602cbe66
commit 91a6387005
64 changed files with 172 additions and 397 deletions
@@ -383,10 +383,6 @@ config SOC_I2C_STOP_INDEPENDENT
bool
default y
config SOC_I2S_NUM
int
default 2
config SOC_I2S_HW_VERSION_1
bool
default y
@@ -395,10 +391,6 @@ config SOC_I2S_SUPPORTS_APLL
bool
default y
config SOC_I2S_SUPPORTS_PLL_F160M
bool
default y
config SOC_I2S_SUPPORTS_PDM
bool
default y
@@ -427,30 +419,10 @@ config SOC_I2S_PDM_MAX_RX_LINES
int
default 1
config SOC_I2S_SUPPORTS_ADC_DAC
bool
default y
config SOC_I2S_SUPPORTS_ADC
bool
default y
config SOC_I2S_SUPPORTS_LCD_CAMERA
bool
default y
config SOC_I2S_MAX_DATA_WIDTH
int
default 24
config SOC_I2S_TRANS_SIZE_ALIGN_WORD
bool
default y
config SOC_I2S_LCD_I80_VARIANT
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
@@ -217,10 +217,8 @@
/*-------------------------- I2S CAPS ----------------------------------------*/
// ESP32 has 2 I2S
#define SOC_I2S_NUM (2U)
#define SOC_I2S_HW_VERSION_1 (1)
#define SOC_I2S_SUPPORTS_APLL (1)
#define SOC_I2S_SUPPORTS_PLL_F160M (1)
#define SOC_I2S_SUPPORTS_PDM (1)
#define SOC_I2S_SUPPORTS_PDM_TX (1) // Support to output raw PDM format data
#define SOC_I2S_SUPPORTS_PCM2PDM (1) // Support to write PCM format but output PDM format data with the help of PCM to PDM filter
@@ -228,13 +226,7 @@
#define SOC_I2S_SUPPORTS_PDM2PCM (1) // Support to input PDM format but read PCM format data with the help of PDM to PCM filter
#define SOC_I2S_PDM_MAX_TX_LINES (1U)
#define SOC_I2S_PDM_MAX_RX_LINES (1U)
#define SOC_I2S_SUPPORTS_ADC_DAC (1)
#define SOC_I2S_SUPPORTS_ADC (1)
#define SOC_I2S_SUPPORTS_LCD_CAMERA (1)
#define SOC_I2S_MAX_DATA_WIDTH (24)
#define SOC_I2S_TRANS_SIZE_ALIGN_WORD (1) // I2S DMA transfer size must be aligned to word
#define SOC_I2S_LCD_I80_VARIANT (1) // I2S has a special LCD mode that can generate Intel 8080 TX timing
/*-------------------------- LCD CAPS ----------------------------------------*/
/* Notes: On esp32, LCD intel 8080 timing is generated by I2S peripheral */
@@ -29,3 +29,11 @@
#define _SOC_CAPS_PCNT_UNITS_PER_INST 8 // Number of units in each PCNT instance
#define _SOC_CAPS_PCNT_CHANS_PER_UNIT 2 // Number of channels in each PCNT unit
#define _SOC_CAPS_PCNT_THRES_POINT_PER_UNIT 2 // Number of threshold points in each PCNT unit
/*------------------------------- I2S ---------------------------------------*/
// helper macros to access module attributes
#define SOC_I2S_ATTR(_attr) SOC_MODULE_ATTR(I2S, _attr)
#define _SOC_CAPS_I2S_INST_NUM 2 // Number of I2S instances
#define _SOC_CAPS_I2S_MAX_DATA_WIDTH 24 // Maximum data line width of I2S
#define _SOC_CAPS_I2S_TRANS_SIZE_ALIGN_WORD 1 // I2S DMA transfer size must be aligned to word
#define _SOC_CAPS_I2S_SUPPORT_ADC_DAC 1 // I2S supports to connect to ADC / DAC converters