feat(etm): add core driver support for esp32-p4

esp_etm core driver support:
- channel allocator
- gpio etm sub driver
- gptimer etm sub driver
This commit is contained in:
morris
2023-08-23 15:11:56 +08:00
parent 3b50c716d8
commit 911c388cf8
11 changed files with 1468 additions and 3177 deletions
+17 -5
View File
@@ -28,6 +28,13 @@
#define ETM_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
#if CONFIG_IDF_TARGET_ESP32P4
// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
#define ETM_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define ETM_RCC_ATOMIC()
#endif
static const char *TAG = "etm";
typedef struct etm_platform_t etm_platform_t;
@@ -78,10 +85,12 @@ static etm_group_t *etm_acquire_group_handle(int group_id)
// initialize ETM group members
group->group_id = group_id;
group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
// enable APB access ETM registers
// if we have multiple ETM groups/instances, we assume the peripheral defines are continuous
periph_module_enable(PERIPH_ETM_MODULE + group_id);
periph_module_reset(PERIPH_ETM_MODULE + group_id);
// enable bus clock for the ETM registers
ETM_RCC_ATOMIC() {
etm_ll_enable_bus_clock(group_id, true);
etm_ll_reset_register(group_id);
}
// initialize HAL context
etm_hal_init(&group->hal);
}
@@ -112,7 +121,10 @@ static void etm_release_group_handle(etm_group_t *group)
assert(s_platform.groups[group_id]);
do_deinitialize = true;
s_platform.groups[group_id] = NULL; // deregister from platform
periph_module_disable(PERIPH_ETM_MODULE + group_id);
// disable the bus clock for the ETM registers
ETM_RCC_ATOMIC() {
etm_ll_enable_bus_clock(group_id, false);
}
}
_lock_release(&s_platform.mutex);
@@ -342,7 +342,7 @@ TEST_CASE("gptimer_etm_task_capture", "[etm]")
TEST_ESP_OK(gptimer_enable(gptimer));
TEST_ESP_OK(gptimer_start(gptimer));
vTaskDelay(pdMS_TO_TICKS(500));
esp_rom_delay_us(500 * 1000);
// simulate the edge signal by software
TEST_ESP_OK(gpio_set_level(input_gpio, 1));
@@ -432,7 +432,7 @@ TEST_CASE("gptimer_start_stop_by_etm_task", "[etm]")
// trigger an pos-edge, this should start the gptimer
TEST_ESP_OK(gpio_set_level(input_gpio, 1));
vTaskDelay(pdMS_TO_TICKS(500));
esp_rom_delay_us(500 * 1000);
uint64_t cur_count_val = 0;
TEST_ESP_OK(gptimer_get_raw_count(gptimer, &cur_count_val));
printf("cur_count_val: %llu\r\n", cur_count_val);
@@ -442,7 +442,7 @@ TEST_CASE("gptimer_start_stop_by_etm_task", "[etm]")
TEST_ESP_OK(gpio_set_level(input_gpio, 0));
uint64_t count_val_0 = 0;
TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_val_0));
vTaskDelay(pdMS_TO_TICKS(500));
esp_rom_delay_us(500 * 1000);
uint64_t count_val_1 = 0;
TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_val_1));
TEST_ASSERT_EQUAL(count_val_0, count_val_1);