mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-02 03:00:34 +03:00
feat(etm): add core driver support for esp32-p4
esp_etm core driver support: - channel allocator - gpio etm sub driver - gptimer etm sub driver
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@@ -28,6 +28,13 @@
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#define ETM_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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#if CONFIG_IDF_TARGET_ESP32P4
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// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
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#define ETM_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
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#else
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#define ETM_RCC_ATOMIC()
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#endif
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static const char *TAG = "etm";
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typedef struct etm_platform_t etm_platform_t;
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@@ -78,10 +85,12 @@ static etm_group_t *etm_acquire_group_handle(int group_id)
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// initialize ETM group members
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group->group_id = group_id;
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group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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// enable APB access ETM registers
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// if we have multiple ETM groups/instances, we assume the peripheral defines are continuous
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periph_module_enable(PERIPH_ETM_MODULE + group_id);
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periph_module_reset(PERIPH_ETM_MODULE + group_id);
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// enable bus clock for the ETM registers
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ETM_RCC_ATOMIC() {
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etm_ll_enable_bus_clock(group_id, true);
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etm_ll_reset_register(group_id);
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}
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// initialize HAL context
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etm_hal_init(&group->hal);
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}
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@@ -112,7 +121,10 @@ static void etm_release_group_handle(etm_group_t *group)
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assert(s_platform.groups[group_id]);
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do_deinitialize = true;
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s_platform.groups[group_id] = NULL; // deregister from platform
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periph_module_disable(PERIPH_ETM_MODULE + group_id);
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// disable the bus clock for the ETM registers
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ETM_RCC_ATOMIC() {
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etm_ll_enable_bus_clock(group_id, false);
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}
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}
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_lock_release(&s_platform.mutex);
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@@ -342,7 +342,7 @@ TEST_CASE("gptimer_etm_task_capture", "[etm]")
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TEST_ESP_OK(gptimer_enable(gptimer));
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TEST_ESP_OK(gptimer_start(gptimer));
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vTaskDelay(pdMS_TO_TICKS(500));
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esp_rom_delay_us(500 * 1000);
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// simulate the edge signal by software
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TEST_ESP_OK(gpio_set_level(input_gpio, 1));
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@@ -432,7 +432,7 @@ TEST_CASE("gptimer_start_stop_by_etm_task", "[etm]")
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// trigger an pos-edge, this should start the gptimer
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TEST_ESP_OK(gpio_set_level(input_gpio, 1));
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vTaskDelay(pdMS_TO_TICKS(500));
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esp_rom_delay_us(500 * 1000);
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uint64_t cur_count_val = 0;
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TEST_ESP_OK(gptimer_get_raw_count(gptimer, &cur_count_val));
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printf("cur_count_val: %llu\r\n", cur_count_val);
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@@ -442,7 +442,7 @@ TEST_CASE("gptimer_start_stop_by_etm_task", "[etm]")
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TEST_ESP_OK(gpio_set_level(input_gpio, 0));
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uint64_t count_val_0 = 0;
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TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_val_0));
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vTaskDelay(pdMS_TO_TICKS(500));
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esp_rom_delay_us(500 * 1000);
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uint64_t count_val_1 = 0;
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TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_val_1));
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TEST_ASSERT_EQUAL(count_val_0, count_val_1);
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