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https://github.com/espressif/esp-idf.git
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fix(bt): Replace 32k_xtal with rtc_slow
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@@ -1563,7 +1563,11 @@ static esp_err_t btdm_low_power_mode_init(void)
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btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
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btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
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} else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
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} else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
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ESP_LOGI(BTDM_LOG_TAG, "Using external 32.768 kHz crystal/oscillator as clock source");
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ESP_LOGI(BTDM_LOG_TAG, "Using external 32.768 kHz crystal/oscillator as clock source");
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select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
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/* The enabling of the 32k crystal/oscillator depends on the RTC slow clock.
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* Therefore, if the 32k crystal/oscillator is enabled, selecting BTDM_LPCLK_SEL_RTC_SLOW
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* and BTDM_LPCLK_SEL_XTAL32K as the lp clock source is equivalent.
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*/
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select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
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set_div_ret = btdm_lpclk_set_div(0);
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set_div_ret = btdm_lpclk_set_div(0);
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assert(select_src_ret && set_div_ret);
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assert(select_src_ret && set_div_ret);
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btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
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btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
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@@ -1697,11 +1697,16 @@ static esp_err_t btdm_low_power_mode_init(esp_bt_controller_config_t *cfg)
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#if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
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#if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
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s_lp_cntl.no_light_sleep = 1;
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s_lp_cntl.no_light_sleep = 1;
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#endif
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#endif
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} else {
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ESP_LOGI(BT_LOG_TAG, "Using external 32.768 kHz crystal/oscillator as clock source");
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}
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}
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} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW) { // Internal 136kHz RC oscillator
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} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW) { // Internal 136kHz RC oscillator
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if (rtc_clk_slow_src_get() != SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
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if (rtc_clk_slow_src_get() != SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
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ESP_LOGW(BT_LOG_TAG, "Internal 136kHz RC oscillator not detected.");
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ESP_LOGW(BT_LOG_TAG, "Internal 136kHz RC oscillator not detected.");
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assert(0);
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assert(0);
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} else {
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ESP_LOGW(BT_LOG_TAG, "Using 136 kHz RC as clock source. The accuracy of this clock is a lot larger than 500ppm which is "
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"required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
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}
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}
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} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
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} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
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#if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
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#if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
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@@ -1725,18 +1730,11 @@ static esp_err_t btdm_low_power_mode_init(esp_bt_controller_config_t *cfg)
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assert(select_src_ret && set_div_ret);
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assert(select_src_ret && set_div_ret);
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btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
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btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
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btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
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btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
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} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
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} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW || s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
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ESP_LOGI(BT_LOG_TAG, "Using external 32.768 kHz crystal/oscillator as clock source");
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/* The enabling of the 32k crystal/oscillator depends on the RTC slow clock.
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select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
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* Therefore, if the 32k crystal/oscillator is enabled, selecting BTDM_LPCLK_SEL_RTC_SLOW
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set_div_ret = btdm_lpclk_set_div(0);
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* and BTDM_LPCLK_SEL_XTAL32K as the lp clock source is equivalent.
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assert(select_src_ret && set_div_ret);
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*/
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btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
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btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
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(1000000 >> (15 - RTC_CLK_CAL_FRACT));
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assert(btdm_lpcycle_us != 0);
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} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW) {
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ESP_LOGW(BT_LOG_TAG, "Using 136 kHz RC as clock source. The accuracy of this clock is a lot larger than 500ppm which is "
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"required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
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select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
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select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
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set_div_ret = btdm_lpclk_set_div(0);
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set_div_ret = btdm_lpclk_set_div(0);
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assert(select_src_ret && set_div_ret);
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assert(select_src_ret && set_div_ret);
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