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fix(esp_hw_support): update memory pointer checks for SPM support

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This commit is contained in:
wuzhenghui
2026-07-10 12:38:47 +08:00
parent d3c628c759
commit 8ff6ec32b0
3 changed files with 14 additions and 4 deletions
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components/esp_hw_support/include/esp_memory_utils.h
+4 -1
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@@ -412,7 +412,10 @@ inline static bool esp_stack_ptr_is_sane(uint32_t sp)
|| esp_stack_ptr_in_extram(sp) || esp_stack_ptr_in_extram(sp)
#endif #endif
#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP #if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
|| esp_ptr_in_rtc_dram_fast((void*) sp) || (esp_ptr_in_rtc_dram_fast((void *)sp) && ((sp & 0xF) == 0))
#endif
#if SOC_MEM_SPM_SUPPORTED
|| (esp_ptr_in_spm((void *)sp) && ((sp & 0xF) == 0))
#endif #endif
; ;
} }
components/espcoredump/src/port/riscv/core_dump_port.c
+9 -2
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -227,6 +227,9 @@ static inline bool esp_core_dump_task_stack_end_is_sane(uint32_t sp)
#endif #endif
#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP #if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
|| esp_ptr_in_rtc_dram_fast((void*) sp) || esp_ptr_in_rtc_dram_fast((void*) sp)
#endif
#if SOC_MEM_SPM_SUPPORTED
|| esp_ptr_in_spm((void *)sp)
#endif #endif
; ;
} }
@@ -311,7 +314,11 @@ bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz)
|| (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr + sz - 1))) || (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr + sz - 1)))
|| (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr + sz - 1))) || (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr + sz - 1)))
|| (esp_ptr_external_ram((void *)addr) && esp_ptr_external_ram((void *)(addr + sz - 1))) || (esp_ptr_external_ram((void *)addr) && esp_ptr_external_ram((void *)(addr + sz - 1)))
|| (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr + sz - 1))); || (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr + sz - 1)))
#if SOC_MEM_SPM_SUPPORTED
|| (esp_ptr_in_spm((void *)addr) && esp_ptr_in_spm((void *)(addr + sz - 1)))
#endif
;
} }
/** /**
components/heap/port/esp32p4/memory_layout.c
+1 -1
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@@ -66,7 +66,7 @@ const soc_memory_type_desc_t soc_memory_types[SOC_MEMORY_TYPE_NUM] = {
[SOC_MEMORY_TYPE_RETENT_MEM] = { "RETENT_RAM", { MALLOC_CAP_RETENTION | MALLOC_CAP_SIMD, MALLOC_L2MEM_BASE_CAPS, 0 }}, [SOC_MEMORY_TYPE_RETENT_MEM] = { "RETENT_RAM", { MALLOC_CAP_RETENTION | MALLOC_CAP_SIMD, MALLOC_L2MEM_BASE_CAPS, 0 }},
[SOC_MEMORY_TYPE_L2MEM] = { "RAM", { MALLOC_L2MEM_BASE_CAPS | MALLOC_CAP_SIMD, 0, 0 }}, [SOC_MEMORY_TYPE_L2MEM] = { "RAM", { MALLOC_L2MEM_BASE_CAPS | MALLOC_CAP_SIMD, 0, 0 }},
[SOC_MEMORY_TYPE_SPIRAM] = { "SPIRAM", { MALLOC_CAP_SPIRAM, 0, ESP32P4_MEM_COMMON_CAPS | MALLOC_CAP_SIMD }}, [SOC_MEMORY_TYPE_SPIRAM] = { "SPIRAM", { MALLOC_CAP_SPIRAM, 0, ESP32P4_MEM_COMMON_CAPS | MALLOC_CAP_SIMD }},
[SOC_MEMORY_TYPE_SPM] = { "SPM", { MALLOC_CAP_SPM, ESP32P4_MEM_COMMON_CAPS | MALLOC_CAP_INTERNAL, 0 }}, [SOC_MEMORY_TYPE_SPM] = { "SPM", { MALLOC_CAP_SPM, 0, ESP32P4_MEM_COMMON_CAPS | MALLOC_CAP_INTERNAL }},
[SOC_MEMORY_TYPE_RTCRAM] = { "RTCRAM", { MALLOC_CAP_RTCRAM, 0, MALLOC_RTCRAM_BASE_CAPS}}, [SOC_MEMORY_TYPE_RTCRAM] = { "RTCRAM", { MALLOC_CAP_RTCRAM, 0, MALLOC_RTCRAM_BASE_CAPS}},
}; };