feat(i2s): support i2s & apll on esp32s31

This commit is contained in:
laokaiyao
2026-04-22 09:30:53 +08:00
committed by Chen Chen
parent 91105b65b6
commit 8d0fca08a0
45 changed files with 2452 additions and 132 deletions
@@ -22,6 +22,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_BUS_WIDTH 24
#define I2S_LL_INST_NUM 2
#define I2S_LL_TRANS_SIZE_ALIGN_WORD 1 // I2S DMA transfer size must be aligned to word
@@ -21,6 +21,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
@@ -23,6 +23,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
@@ -22,6 +22,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
@@ -23,6 +23,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
@@ -22,6 +22,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
@@ -22,6 +22,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
@@ -247,9 +248,9 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
case I2S_CLK_SRC_PLL_96M:
PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 1;
break;
// case I2S_CLK_SRC_PLL_64M:
// PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 2;
// break;
case I2S_CLK_SRC_XTAL_X2:
PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 2;
break;
case I2S_CLK_SRC_EXTERNAL:
PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 3;
break;
@@ -275,9 +276,9 @@ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
case I2S_CLK_SRC_PLL_96M:
PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 1;
break;
// case I2S_CLK_SRC_PLL_64M:
// PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 2;
// break;
case I2S_CLK_SRC_XTAL_X2:
PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 2;
break;
case I2S_CLK_SRC_EXTERNAL:
PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 3;
break;
@@ -23,6 +23,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
@@ -251,9 +252,9 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
case I2S_CLK_SRC_PLL_96M:
PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 1;
break;
// case I2S_CLK_SRC_PLL_64M:
// PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 2;
// break;
case I2S_CLK_SRC_XTAL_X2:
PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 2;
break;
case I2S_CLK_SRC_EXTERNAL:
PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 3;
break;
@@ -279,9 +280,9 @@ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
case I2S_CLK_SRC_PLL_96M:
PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 1;
break;
// case I2S_CLK_SRC_PLL_64M:
// PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 2;
// break;
case I2S_CLK_SRC_XTAL_X2:
PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 2;
break;
case I2S_CLK_SRC_EXTERNAL:
PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 3;
break;
@@ -25,6 +25,7 @@
#include "hal/config.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 3
#ifdef __cplusplus
@@ -24,6 +24,7 @@
#include "hal/assert.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_BUS_WIDTH 24
#define I2S_LL_INST_NUM 1
@@ -21,6 +21,7 @@
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_SUPPORT(_feat) I2S_LL_SUPPORT_ ## _feat
#define I2S_LL_INST_NUM 2
#ifdef __cplusplus
@@ -0,0 +1,112 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/i2s_periph.h"
#include "soc/i2s_reg.h"
#include "soc/gpio_sig_map.h"
#include "soc/lp_gpio_sig_map.h"
/*
Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc
*/
const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = {
[0] = {
.mck_out_sig = I2S0_MCLK_PAD_OUT_IDX,
.mck_in_sig = I2S0_MCLK_PAD_IN_IDX,
.m_tx_bck_sig = I2S0_O_BCK_PAD_OUT_IDX,
.m_rx_bck_sig = I2S0_I_BCK_PAD_OUT_IDX,
.m_tx_ws_sig = I2S0_O_WS_PAD_OUT_IDX,
.m_rx_ws_sig = I2S0_I_WS_PAD_OUT_IDX,
.s_tx_bck_sig = I2S0_O_BCK_PAD_IN_IDX,
.s_rx_bck_sig = I2S0_I_BCK_PAD_IN_IDX,
.s_tx_ws_sig = I2S0_O_WS_PAD_IN_IDX,
.s_rx_ws_sig = I2S0_I_WS_PAD_IN_IDX,
.data_out_sigs[0] = I2S0_O_SD_PAD_OUT_IDX,
.data_out_sigs[1] = I2S0_O_SD1_PAD_OUT_IDX,
.data_in_sigs[0] = I2S0_I_SD_PAD_IN_IDX,
.data_in_sigs[1] = I2S0_I_SD1_PAD_IN_IDX,
.data_in_sigs[2] = I2S0_I_SD2_PAD_IN_IDX,
.data_in_sigs[3] = I2S0_I_SD3_PAD_IN_IDX,
.irq = ETS_I2S0_INTR_SOURCE,
},
[1] = {
.mck_out_sig = I2S1_MCLK_PAD_OUT_IDX,
.mck_in_sig = I2S1_MCLK_PAD_IN_IDX,
.m_tx_bck_sig = I2S1_O_BCK_PAD_OUT_IDX,
.m_rx_bck_sig = I2S1_I_BCK_PAD_OUT_IDX,
.m_tx_ws_sig = I2S1_O_WS_PAD_OUT_IDX,
.m_rx_ws_sig = I2S1_I_WS_PAD_OUT_IDX,
.s_tx_bck_sig = I2S1_O_BCK_PAD_IN_IDX,
.s_rx_bck_sig = I2S1_I_BCK_PAD_IN_IDX,
.s_tx_ws_sig = I2S1_O_WS_PAD_IN_IDX,
.s_rx_ws_sig = I2S1_I_WS_PAD_IN_IDX,
.data_out_sigs[0] = I2S1_O_SD_PAD_OUT_IDX,
.data_out_sigs[1] = -1,
.data_in_sigs[0] = I2S1_I_SD_PAD_IN_IDX,
.data_in_sigs[1] = -1,
.data_in_sigs[2] = -1,
.data_in_sigs[3] = -1,
.irq = ETS_I2S1_INTR_SOURCE,
},
};
/**
* I2S Registers to be saved during sleep retention
* - I2S_RX_CONF_REG
* - I2S_TX_CONF_REG
* - I2S_RX_CONF1_REG
* - I2S_TX_CONF1_REG
* - I2S_RX_RECOMB_CTRL_REG
* - I2S_RX_RECOMB_DMA_CH0_REG
* - I2S_RX_RECOMB_DMA_CH1_REG
* - I2S_RX_RECOMB_DMA_CH2_REG
* - I2S_RX_RECOMB_DMA_CH3_REG
* - I2S_TX_PCM2PDM_CONF_REG
* - I2S_TX_PCM2PDM_CONF1_REG
* - I2S_RX_PDM2PCM_CONF_REG
* - I2S_RX_TDM_CTRL_REG
* - I2S_TX_TDM_CTRL_REG
* - I2S_RXEOF_NUM_REG
* - I2S_ETM_CONF_REG
*/
#define I2S_RETENTION_REGS_CNT 16
#define I2S_RETENTION_REGS_BASE(i) I2S_RX_CONF_REG(i)
static const uint32_t i2s_regs_map[4] = {0x123fff, 0x0, 0x0, 0x0};
#define I2S_SLEEP_RETENTION_ENTRIES(i2s_port) { \
/* Save/restore the register values */ \
[0] = { .config = REGDMA_LINK_ADDR_MAP_INIT( \
REGDMA_I2S_LINK(0x00), \
I2S_RETENTION_REGS_BASE(i2s_port), \
I2S_RETENTION_REGS_BASE(i2s_port), \
I2S_RETENTION_REGS_CNT, 0, 0, \
i2s_regs_map[0], i2s_regs_map[1], \
i2s_regs_map[2], i2s_regs_map[3]), \
.owner = ENTRY(0)}, \
};
static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0);
static const regdma_entries_config_t i2s1_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(1);
const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)] = {
[0] = {
.retention_module = SLEEP_RETENTION_MODULE_I2S0,
.entry_array = i2s0_regs_retention,
.array_size = ARRAY_SIZE(i2s0_regs_retention)
},
[1] = {
.retention_module = SLEEP_RETENTION_MODULE_I2S1,
.entry_array = i2s1_regs_retention,
.array_size = ARRAY_SIZE(i2s1_regs_retention)
},
};
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