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feat(i2s): support i2s & apll on esp32s31

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This commit is contained in:
laokaiyao
2026-04-22 09:30:53 +08:00
committed by Chen Chen
parent 91105b65b6
commit 8d0fca08a0
45 changed files with 2452 additions and 132 deletions
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components/esp_driver_i2s/test_apps/i2s/README.md
+2 -2
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 |
| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | --------- |
components/esp_driver_i2s/test_apps/i2s/main/test_i2s.c
+5 -2
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@@ -931,7 +931,7 @@ static void i2s_test_common_sample_rate(i2s_chan_handle_t rx_chan, i2s_std_clk_c
// 196000 Hz sample rate doesn't support on PLL_96M target
case_cnt = 15;
#endif
#if I2S_LL_SUPPORT_XTAL
#if I2S_LL_SUPPORT(XTAL)
// Can't support a very high sample rate while using XTAL as clock source
if (clk_cfg->clk_src == I2S_CLK_SRC_XTAL) {
case_cnt = 10;
@@ -982,7 +982,7 @@ TEST_CASE("I2S_default_PLL_clock_test", "[i2s]")
std_cfg.clk_cfg.clk_src = I2S_LL_DEFAULT_CLK_SRC;
#endif
i2s_test_common_sample_rate(rx_handle, &std_cfg.clk_cfg);
#if I2S_LL_SUPPORT_XTAL
#if I2S_LL_SUPPORT(XTAL)
std_cfg.clk_cfg.clk_src = I2S_CLK_SRC_XTAL;
i2s_test_common_sample_rate(rx_handle, &std_cfg.clk_cfg);
#endif
@@ -1046,6 +1046,9 @@ TEST_CASE("I2S_package_lost_test", "[i2s]")
.slot_cfg = I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG(I2S_DATA_BIT_WIDTH_32BIT, I2S_SLOT_MODE_STEREO),
.gpio_cfg = I2S_TEST_MASTER_DEFAULT_PIN,
};
#if CONFIG_IDF_TARGET_ESP32S31 // esp32s31 doesn't support PLL as clock source, use APLL instead
std_cfg.clk_cfg.clk_src = I2S_CLK_SRC_APLL;
#endif
TEST_ESP_OK(i2s_new_channel(&chan_cfg, NULL, &rx_handle));
TEST_ESP_OK(i2s_channel_init_std_mode(rx_handle, &std_cfg));
components/esp_driver_i2s/test_apps/i2s/pytest_i2s.py
+3 -1
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@@ -3,6 +3,7 @@
import pytest
from pytest_embedded import Dut
from pytest_embedded_idf.utils import idf_parametrize
from pytest_embedded_idf.utils import soc_filtered_targets
@pytest.mark.generic
@@ -16,9 +17,10 @@ from pytest_embedded_idf.utils import idf_parametrize
)
@idf_parametrize(
'target',
['esp32', 'esp32s2', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32p4', 'esp32c61'],
soc_filtered_targets('SOC_I2S_SUPPORTED == 1 and IDF_TARGET not in ["esp32c5", "esp32s3"]'),
indirect=['target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32h21', 'esp32h4'], reason='lack of runners')
def test_i2s(dut: Dut) -> None:
dut.run_all_single_board_cases()