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Merge branch 'feat/uart_dma_support_v5.4' into 'release/v5.4'

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feat(uhci): Add uhci(uart-dma) support on current chips (backport v5.4)

See merge request espressif/esp-idf!41517
This commit is contained in:
morris
2025-08-29 13:49:56 +08:00
parent 13f276c030 f148acc534
commit 8a94f1957c
60 changed files with 2275 additions and 142 deletions
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components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+8
View File
@@ -15,6 +15,10 @@ config SOC_UART_SUPPORTED
bool
default y
config SOC_UHCI_SUPPORTED
bool
default y
config SOC_GDMA_SUPPORTED
bool
default y
@@ -1335,6 +1339,10 @@ config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
bool
default y
config SOC_UHCI_NUM
int
default 1
config SOC_COEX_HW_PTI
bool
default y
components/soc/esp32c6/include/soc/soc_caps.h
+4
View File
@@ -20,6 +20,7 @@
#define SOC_ADC_SUPPORTED 1
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_UART_SUPPORTED 1
#define SOC_UHCI_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
#define SOC_AHB_GDMA_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
@@ -517,6 +518,9 @@
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
/*--------------------------- UHCI CAPS -------------------------------------*/
#define SOC_UHCI_NUM (1UL)
// TODO: IDF-5679 (Copy from esp32c3, need check)
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1)