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Cleanup soc_memprot_types.h for C6/H2

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This header is not required as there is no PMS peripheral in C6/H2

Closes IDF-6332
This commit is contained in:
Mahavir Jain
2023-03-15 13:16:27 +05:30
parent b29ed0ba0b
commit 891df4eff9
6 changed files with 4 additions and 217 deletions
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components/soc/esp32c6/include/soc/soc_caps.h
-3
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@@ -416,9 +416,6 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
/*-------------------------- MEMPROT CAPS ------------------------------------*/
/*-------------------------- UART CAPS ---------------------------------------*/
// ESP32-C6 has 2 UARTs
#define SOC_UART_NUM (2)
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
-8
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@@ -991,14 +991,6 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128
bool
default y
config SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE
int
default 16
config SOC_MEMPROT_MEM_ALIGN_SIZE
int
default 512
config SOC_UART_NUM
int
default 2
components/soc/esp32h2/include/soc/soc_caps.h
-6
View File
@@ -234,7 +234,6 @@
#define SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX (16)
#define SOC_LEDC_FADE_PARAMS_BIT_WIDTH (10)
// TODO: IDF-6332 (Copy from esp32c6, need check)
/*-------------------------- MPU CAPS ----------------------------------------*/
#define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED 0
#define SOC_MPU_MIN_REGION_SIZE 0x20000000U
@@ -418,11 +417,6 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
// TODO: IDF-6332 (Copy from esp32c6, need check)
/*-------------------------- MEMPROT CAPS ------------------------------------*/
#define SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE 16
#define SOC_MEMPROT_MEM_ALIGN_SIZE 512
/*-------------------------- UART CAPS ---------------------------------------*/
// ESP32-H2 has 2 UARTs
#define SOC_UART_NUM (2)