From 88b62b19fd24c5d775f4b8b306c05a641f5d27eb Mon Sep 17 00:00:00 2001 From: Song Ruo Jing Date: Tue, 31 Mar 2026 21:42:55 +0800 Subject: [PATCH] refactor(ledc): refactored some LEDC LL functions --- components/esp_driver_ledc/src/ledc.c | 56 ++++----- .../test_apps/ledc/main/test_ledc_sleep.cpp | 2 +- .../esp_hal_ledc/esp32/include/hal/ledc_ll.h | 64 +++++----- components/esp_hal_ledc/esp32/ledc_periph.c | 13 +- .../esp32c2/include/hal/ledc_ll.h | 64 +++++----- components/esp_hal_ledc/esp32c2/ledc_periph.c | 7 +- .../esp32c3/include/hal/ledc_ll.h | 64 +++++----- components/esp_hal_ledc/esp32c3/ledc_periph.c | 7 +- .../esp32c5/include/hal/ledc_ll.h | 75 +++++------ components/esp_hal_ledc/esp32c5/ledc_periph.c | 100 +++++++-------- .../esp32c6/include/hal/ledc_ll.h | 64 +++++----- components/esp_hal_ledc/esp32c6/ledc_periph.c | 100 +++++++-------- .../esp32c61/include/hal/ledc_ll.h | 75 +++++------ .../esp_hal_ledc/esp32c61/ledc_periph.c | 100 +++++++-------- .../esp32h2/include/hal/ledc_ll.h | 64 +++++----- components/esp_hal_ledc/esp32h2/ledc_periph.c | 100 +++++++-------- .../esp32h21/include/hal/ledc_ll.h | 64 +++++----- .../esp_hal_ledc/esp32h21/ledc_periph.c | 100 +++++++-------- .../esp32h4/include/hal/ledc_ll.h | 75 +++++------ components/esp_hal_ledc/esp32h4/ledc_periph.c | 116 +++++++++--------- .../esp32p4/include/hal/ledc_ll.h | 75 +++++------ components/esp_hal_ledc/esp32p4/ledc_periph.c | 116 +++++++++--------- .../esp32s2/include/hal/ledc_ll.h | 64 +++++----- components/esp_hal_ledc/esp32s2/ledc_periph.c | 7 +- .../esp32s3/include/hal/ledc_ll.h | 64 +++++----- components/esp_hal_ledc/esp32s3/ledc_periph.c | 7 +- .../esp_hal_ledc/include/hal/ledc_hal.h | 46 ------- .../esp_hal_ledc/include/hal/ledc_periph.h | 25 ++-- components/esp_hal_ledc/ledc_hal_iram.c | 10 -- .../soc/esp32/include/soc/clk_tree_defs.h | 1 + .../soc/esp32c2/include/soc/clk_tree_defs.h | 1 + .../soc/esp32c3/include/soc/clk_tree_defs.h | 1 + .../soc/esp32c5/include/soc/clk_tree_defs.h | 1 + .../soc/esp32c6/include/soc/clk_tree_defs.h | 1 + .../soc/esp32c61/include/soc/clk_tree_defs.h | 1 + .../soc/esp32h2/include/soc/clk_tree_defs.h | 1 + .../soc/esp32h21/include/soc/clk_tree_defs.h | 1 + .../soc/esp32h4/include/soc/clk_tree_defs.h | 1 + .../soc/esp32p4/include/soc/clk_tree_defs.h | 1 + .../soc/esp32s2/include/soc/clk_tree_defs.h | 1 + .../soc/esp32s3/include/soc/clk_tree_defs.h | 1 + 41 files changed, 890 insertions(+), 846 deletions(-) diff --git a/components/esp_driver_ledc/src/ledc.c b/components/esp_driver_ledc/src/ledc.c index d8f48b02183..161ef298d43 100644 --- a/components/esp_driver_ledc/src/ledc.c +++ b/components/esp_driver_ledc/src/ledc.c @@ -118,23 +118,23 @@ static const ledc_clk_src_t s_timer_specific_clks[] = LEDC_LL_TIMER_SPECIFIC_CLO static esp_err_t ledc_create_sleep_retention_link_cb(void *arg) { #if SOC_LEDC_SUPPORT_SLEEP_RETENTION - sleep_retention_module_t module = ledc_reg_retention_info.module_id; + sleep_retention_module_t module = ledc_reg_retention_info[0].module_id; - esp_err_t err = sleep_retention_entries_create(ledc_reg_retention_info.common.regdma_entry_array, - ledc_reg_retention_info.common.array_size, + esp_err_t err = sleep_retention_entries_create(ledc_reg_retention_info[0].common.regdma_entry_array, + ledc_reg_retention_info[0].common.array_size, REGDMA_LINK_PRI_LEDC, module); bool slp_retention_create_failed = (err != ESP_OK); for (int i = 0; i < SOC_LEDC_TIMER_NUM && !slp_retention_create_failed; i++) { - err = sleep_retention_entries_create(ledc_reg_retention_info.timer[i].regdma_entry_array, - ledc_reg_retention_info.timer[i].array_size, + err = sleep_retention_entries_create(ledc_reg_retention_info[0].timer[i].regdma_entry_array, + ledc_reg_retention_info[0].timer[i].array_size, REGDMA_LINK_PRI_LEDC, module); slp_retention_create_failed |= (err != ESP_OK); } for (int j = 0; j < SOC_LEDC_CHANNEL_NUM && !slp_retention_create_failed; j++) { - err = sleep_retention_entries_create(ledc_reg_retention_info.channel[j].regdma_entry_array, - ledc_reg_retention_info.channel[j].array_size, + err = sleep_retention_entries_create(ledc_reg_retention_info[0].channel[j].regdma_entry_array, + ledc_reg_retention_info[0].channel[j].array_size, REGDMA_LINK_PRI_LEDC, module); slp_retention_create_failed |= (err != ESP_OK); } @@ -176,23 +176,13 @@ static bool ledc_slow_clk_calibrate(void) return false; } -static esp_err_t ledc_enable_intr_type(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_intr_type_t type) -{ - if (type == LEDC_INTR_FADE_END) { - ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, true); - } else { - ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, false); - } - return ESP_OK; -} - static void _ledc_fade_hw_acquire(ledc_mode_t mode, ledc_channel_t channel) { ledc_fade_t *fade = s_ledc_fade_rec[mode][channel]; if (fade) { xSemaphoreTake(fade->ledc_fade_sem, portMAX_DELAY); portENTER_CRITICAL(&ledc_spinlock); - ledc_enable_intr_type(mode, channel, LEDC_INTR_DISABLE); + ledc_ll_enable_interrupt(p_ledc_obj[mode]->ledc_hal.dev, LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(mode, channel), false); portEXIT_CRITICAL(&ledc_spinlock); } } @@ -433,7 +423,7 @@ static bool ledc_speed_mode_ctx_create(ledc_mode_t speed_mode) ledc_new_mode_obj->sleep_mode = LEDC_SLEEP_MODE_INVALID; #if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP // for targets that is !SOC_LEDC_SUPPORT_SLEEP_RETENTION, retention module should still be inited to avoid TOP PD // Initialize sleep retention module for LEDC - sleep_retention_module_t module = ledc_reg_retention_info.module_id; + sleep_retention_module_t module = ledc_reg_retention_info[0].module_id; sleep_retention_module_init_param_t init_param = { .cbs = { .create = { @@ -818,7 +808,7 @@ static esp_err_t _ledc_set_pin(int gpio_num, bool out_inv, ledc_mode_t speed_mod if (old_gpio_rsv_mask & BIT64(gpio_num)) { ESP_LOGW(LEDC_TAG, "GPIO %d is not usable, maybe conflict with others", gpio_num); } - gpio_matrix_output(gpio_num, ledc_periph_signal[speed_mode].sig_out0_idx + channel, out_inv, false); + gpio_matrix_output(gpio_num, ledc_periph_signal[0].speed_mode[speed_mode].sig_out0_idx + channel, out_inv, false); portENTER_CRITICAL(&ledc_spinlock); p_ledc_obj[speed_mode]->occupied_pin_mask[channel] |= BIT64(gpio_num); portEXIT_CRITICAL(&ledc_spinlock); @@ -966,12 +956,12 @@ esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf) } #if LEDC_USE_RETENTION_LINK if (slp_retention_alloc) { - if (sleep_retention_module_allocate(ledc_reg_retention_info.module_id) != ESP_OK) { + if (sleep_retention_module_allocate(ledc_reg_retention_info[0].module_id) != ESP_OK) { ESP_LOGW(LEDC_TAG, "create retention module failed, power domain can't turn off"); } } if (slp_retention_free) { - sleep_retention_module_free(ledc_reg_retention_info.module_id); + sleep_retention_module_free(ledc_reg_retention_info[0].module_id); } #endif @@ -1215,12 +1205,13 @@ static void IRAM_ATTR ledc_fade_isr(void *arg) if (p_ledc_obj[speed_mode] == NULL) { continue; } - ledc_hal_get_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, &intr_status); + intr_status = ledc_ll_get_intr_status(p_ledc_obj[speed_mode]->ledc_hal.dev) & LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode); + intr_status >>= __builtin_ctzll(intr_status); while (intr_status) { ledc_calc_fade_end_channel(&intr_status, &channel); // clear interrupt - ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel); + ledc_ll_clear_intr_status(p_ledc_obj[speed_mode]->ledc_hal.dev, LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel)); if (s_ledc_fade_rec[speed_mode][channel] == NULL) { //fade object not initialized yet. @@ -1454,10 +1445,10 @@ static void _ledc_fade_start(ledc_mode_t speed_mode, ledc_channel_t channel, led ledc_fade_t *fade = s_ledc_fade_rec[speed_mode][channel]; fade->mode = fade_mode; // Clear interrupt status of channel - ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel); + ledc_ll_clear_intr_status(p_ledc_obj[speed_mode]->ledc_hal.dev, LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel)); // Enable interrupt for channel portENTER_CRITICAL(&ledc_spinlock); - ledc_enable_intr_type(speed_mode, channel, LEDC_INTR_FADE_END); + ledc_ll_enable_interrupt(p_ledc_obj[speed_mode]->ledc_hal.dev, LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel), true); // Set fade state to HW_FADE state for starting the fade assert(fade->fsm == LEDC_FSM_IDLE); fade->fsm = LEDC_FSM_HW_FADE; @@ -1534,7 +1525,7 @@ esp_err_t ledc_fade_stop(ledc_mode_t speed_mode, ledc_channel_t channel) } // Fade state is either HW_FADE or ISR_CAL (there is a fade in process) // Disable ledc channel interrupt first - ledc_enable_intr_type(speed_mode, channel, LEDC_INTR_DISABLE); + ledc_ll_enable_interrupt(p_ledc_obj[speed_mode]->ledc_hal.dev, LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel), false); // Config duty to the duty cycle at this moment uint32_t duty_cur = ledc_get_duty(speed_mode, channel); ledc_duty_config(speed_mode, @@ -1580,12 +1571,17 @@ esp_err_t ledc_fade_func_install(int intr_alloc_flags) } LEDC_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "LEDC not initialized, call ledc_timer_config first", ESP_ERR_INVALID_STATE); + uint32_t intr_mask = LEDC_LL_DUTY_CHANGE_END_INTR_MASK(LEDC_LOW_SPEED_MODE); +#if SOC_LEDC_SUPPORT_HS_MODE + intr_mask |= LEDC_LL_DUTY_CHANGE_END_INTR_MASK(LEDC_HIGH_SPEED_MODE); +#endif + //OR intr_alloc_flags with ESP_INTR_FLAG_IRAM because the fade isr is in IRAM return esp_intr_alloc_intrstatus( - ETS_LEDC_INTR_SOURCE, + ledc_periph_signal[0].irq_id, intr_alloc_flags | ESP_INTR_FLAG_IRAM, - (uint32_t)ledc_hal_get_fade_end_intr_addr(&(p_ledc_obj[speed_mode]->ledc_hal)), - LEDC_LL_FADE_END_INTR_MASK, + (uint32_t)ledc_ll_get_intr_status_reg(p_ledc_obj[speed_mode]->ledc_hal.dev), + intr_mask, ledc_fade_isr, NULL, &s_ledc_fade_isr_handle diff --git a/components/esp_driver_ledc/test_apps/ledc/main/test_ledc_sleep.cpp b/components/esp_driver_ledc/test_apps/ledc/main/test_ledc_sleep.cpp index 83958a1c719..5c6beeaa51e 100644 --- a/components/esp_driver_ledc/test_apps/ledc/main/test_ledc_sleep.cpp +++ b/components/esp_driver_ledc/test_apps/ledc/main/test_ledc_sleep.cpp @@ -86,7 +86,7 @@ TEST_CASE("ledc can output after light sleep (LEDC power domain pd)", "[ledc]") test_ledc_sleep_retention(true); // ledc driver does not have channel release, we will do retention release here to avoid memory leak - sleep_retention_module_t module = ledc_reg_retention_info.module_id; + sleep_retention_module_t module = ledc_reg_retention_info[0].module_id; sleep_retention_module_free(module); sleep_retention_module_deinit(module); } diff --git a/components/esp_hal_ledc/esp32/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32/include/hal/ledc_ll.h index 595b571ab4f..9a6fb649570 100644 --- a/components/esp_hal_ledc/esp32/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32/include/hal/ledc_ll.h @@ -15,16 +15,24 @@ #include "soc/ledc_reg.h" #include "soc/dport_reg.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) + #define LEDC_LL_DUTY_NUM_MAX (LEDC_DUTY_NUM_LSCH0_V) #define LEDC_LL_DUTY_CYCLE_MAX (LEDC_DUTY_CYCLE_LSCH0_V) #define LEDC_LL_DUTY_SCALE_MAX (LEDC_DUTY_SCALE_LSCH0_V) #define LEDC_LL_HPOINT_VAL_MAX (LEDC_HPOINT_LSCH0_V) #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0xffffUL << LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) ((speed_mode) == LEDC_LOW_SPEED_MODE ? (0xffUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S) : (0xffUL << LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_S)) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) ((speed_mode) == LEDC_LOW_SPEED_MODE ? BIT(LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S + (channel)) : BIT(LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_S + (channel))) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel)) #define LEDC_LL_GLOBAL_CLOCKS { \ LEDC_SLOW_CLK_APB, \ @@ -542,62 +550,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = (speed_mode == LEDC_LOW_SPEED_MODE) ? LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S : LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = (speed_mode == LEDC_LOW_SPEED_MODE) ? LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S : LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = (speed_mode == LEDC_LOW_SPEED_MODE) ? LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S : LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32/ledc_periph.c b/components/esp_hal_ledc/esp32/ledc_periph.c index 27360097db9..b55bbefb84a 100644 --- a/components/esp_hal_ledc/esp32/ledc_periph.c +++ b/components/esp_hal_ledc/esp32/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -10,11 +10,12 @@ /* Bunch of constants for every LEDC peripheral: GPIO signals */ -const ledc_signal_conn_t ledc_periph_signal[2] = { +const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_HS_SIG_OUT0_IDX, - }, - { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_HS_SIG_OUT0_IDX }, + [1] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; diff --git a/components/esp_hal_ledc/esp32c2/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32c2/include/hal/ledc_ll.h index db40564a96c..41105c8421a 100644 --- a/components/esp_hal_ledc/esp32c2/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32c2/include/hal/ledc_ll.h @@ -16,8 +16,11 @@ #include "soc/system_struct.h" #include "hal/assert.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_DUTY_NUM_CH0_V) @@ -27,8 +30,13 @@ #define LEDC_LL_OVF_CNT_MAX (LEDC_OVF_NUM_CH0_V + 1) #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) #define LEDC_LL_GLOBAL_CLOCKS { \ LEDC_SLOW_CLK_PLL_DIV, \ @@ -524,62 +532,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32c2/ledc_periph.c b/components/esp_hal_ledc/esp32c2/ledc_periph.c index 9b6690d4dcc..5f53c404b2f 100644 --- a/components/esp_hal_ledc/esp32c2/ledc_periph.c +++ b/components/esp_hal_ledc/esp32c2/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,6 +12,9 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; diff --git a/components/esp_hal_ledc/esp32c3/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32c3/include/hal/ledc_ll.h index 4bb14ed1c8d..89c6118ee6d 100644 --- a/components/esp_hal_ledc/esp32c3/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32c3/include/hal/ledc_ll.h @@ -16,8 +16,11 @@ #include "soc/system_struct.h" #include "hal/assert.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_DUTY_NUM_LSCH0_V) @@ -27,8 +30,13 @@ #define LEDC_LL_OVF_CNT_MAX (LEDC_OVF_NUM_LSCH0_V + 1) #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0x3fUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_LSCH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) #define LEDC_LL_GLOBAL_CLOCKS { \ LEDC_SLOW_CLK_APB, \ @@ -525,62 +533,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32c3/ledc_periph.c b/components/esp_hal_ledc/esp32c3/ledc_periph.c index 9b6690d4dcc..5f53c404b2f 100644 --- a/components/esp_hal_ledc/esp32c3/ledc_periph.c +++ b/components/esp_hal_ledc/esp32c3/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,6 +12,9 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; diff --git a/components/esp_hal_ledc/esp32c5/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32c5/include/hal/ledc_ll.h index 7b91ae41452..a7dc1f64f24 100644 --- a/components/esp_hal_ledc/esp32c5/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32c5/include/hal/ledc_ll.h @@ -19,8 +19,11 @@ #include "soc/soc_caps.h" #include "soc/soc_etm_source.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_GAMMA_RANGE0_DUTY_NUM_V) @@ -31,8 +34,13 @@ #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) #define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) // Channel tasks: ID, enable register and bit #define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \ @@ -496,12 +504,11 @@ static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step) { HAL_ASSERT(range < SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX); - ledc_channel_gamma_fade_param_t range_param = { - .duty_inc = dir, - .duty_cycle = cycle, - .scale = scale, - .duty_num = step, - }; + ledc_channel_gamma_fade_param_t range_param = {}; + range_param.duty_inc = dir; + range_param.duty_cycle = cycle; + range_param.scale = scale; + range_param.duty_num = step; LEDC_GAMMA_RAM.channel[channel_num].entry[range].val = range_param.val; } @@ -608,62 +615,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32c5/ledc_periph.c b/components/esp_hal_ledc/esp32c5/ledc_periph.c index 7cc5d7a377d..57484af7a63 100644 --- a/components/esp_hal_ledc/esp32c5/ledc_periph.c +++ b/components/esp_hal_ledc/esp32c5/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,7 +13,10 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; @@ -122,50 +125,51 @@ static const regdma_entries_config_t ledc_channel3_regdma_entries[] = LEDC_CHANN static const regdma_entries_config_t ledc_channel4_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(4); static const regdma_entries_config_t ledc_channel5_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(5); -const ledc_reg_retention_info_t ledc_reg_retention_info = { - .common = { - .regdma_entry_array = ledc_common_regdma_entries, - .array_size = ARRAY_SIZE(ledc_common_regdma_entries), - }, - .timer[0] = { - .regdma_entry_array = ledc_timer0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), - }, - .timer[1] = { - .regdma_entry_array = ledc_timer1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), - }, - .timer[2] = { - .regdma_entry_array = ledc_timer2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), - }, - .timer[3] = { - .regdma_entry_array = ledc_timer3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), - }, - .channel[0] = { - .regdma_entry_array = ledc_channel0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), - }, - .channel[1] = { - .regdma_entry_array = ledc_channel1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), - }, - .channel[2] = { - .regdma_entry_array = ledc_channel2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), - }, - .channel[3] = { - .regdma_entry_array = ledc_channel3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), - }, - .channel[4] = { - .regdma_entry_array = ledc_channel4_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), - }, - .channel[5] = { - .regdma_entry_array = ledc_channel5_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), - }, - .module_id = SLEEP_RETENTION_MODULE_LEDC, +const ledc_reg_retention_info_t ledc_reg_retention_info[1] = {{ + .common = { + .regdma_entry_array = ledc_common_regdma_entries, + .array_size = ARRAY_SIZE(ledc_common_regdma_entries), + }, + .timer[0] = { + .regdma_entry_array = ledc_timer0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), + }, + .timer[1] = { + .regdma_entry_array = ledc_timer1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), + }, + .timer[2] = { + .regdma_entry_array = ledc_timer2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), + }, + .timer[3] = { + .regdma_entry_array = ledc_timer3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), + }, + .channel[0] = { + .regdma_entry_array = ledc_channel0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), + }, + .channel[1] = { + .regdma_entry_array = ledc_channel1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), + }, + .channel[2] = { + .regdma_entry_array = ledc_channel2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), + }, + .channel[3] = { + .regdma_entry_array = ledc_channel3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), + }, + .channel[4] = { + .regdma_entry_array = ledc_channel4_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), + }, + .channel[5] = { + .regdma_entry_array = ledc_channel5_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), + }, + .module_id = SLEEP_RETENTION_MODULE_LEDC, + } }; diff --git a/components/esp_hal_ledc/esp32c6/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32c6/include/hal/ledc_ll.h index 2213390b65d..c24bf4f8473 100644 --- a/components/esp_hal_ledc/esp32c6/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32c6/include/hal/ledc_ll.h @@ -20,8 +20,11 @@ #include "soc/soc_caps.h" #include "soc/soc_etm_source.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_GAMMA_DUTY_NUM_V) @@ -32,8 +35,13 @@ #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) #define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) #define LEDC_LL_GLOBAL_CLK_NC_BY_DEFAULT 1 #define LEDC_LL_GLOBAL_CLK_DEFAULT LEDC_SLOW_CLK_RC_FAST // The temporal global clock source to set to at least make the LEDC core clock on @@ -732,62 +740,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32c6/ledc_periph.c b/components/esp_hal_ledc/esp32c6/ledc_periph.c index ca09e672c3e..0d09047c871 100644 --- a/components/esp_hal_ledc/esp32c6/ledc_periph.c +++ b/components/esp_hal_ledc/esp32c6/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,7 +13,10 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; @@ -111,50 +114,51 @@ static const regdma_entries_config_t ledc_channel3_regdma_entries[] = LEDC_CHANN static const regdma_entries_config_t ledc_channel4_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(4); static const regdma_entries_config_t ledc_channel5_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(5); -const ledc_reg_retention_info_t ledc_reg_retention_info = { - .common = { - .regdma_entry_array = ledc_common_regdma_entries, - .array_size = ARRAY_SIZE(ledc_common_regdma_entries), - }, - .timer[0] = { - .regdma_entry_array = ledc_timer0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), - }, - .timer[1] = { - .regdma_entry_array = ledc_timer1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), - }, - .timer[2] = { - .regdma_entry_array = ledc_timer2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), - }, - .timer[3] = { - .regdma_entry_array = ledc_timer3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), - }, - .channel[0] = { - .regdma_entry_array = ledc_channel0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), - }, - .channel[1] = { - .regdma_entry_array = ledc_channel1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), - }, - .channel[2] = { - .regdma_entry_array = ledc_channel2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), - }, - .channel[3] = { - .regdma_entry_array = ledc_channel3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), - }, - .channel[4] = { - .regdma_entry_array = ledc_channel4_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), - }, - .channel[5] = { - .regdma_entry_array = ledc_channel5_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), - }, - .module_id = SLEEP_RETENTION_MODULE_LEDC, +const ledc_reg_retention_info_t ledc_reg_retention_info[1] = {{ + .common = { + .regdma_entry_array = ledc_common_regdma_entries, + .array_size = ARRAY_SIZE(ledc_common_regdma_entries), + }, + .timer[0] = { + .regdma_entry_array = ledc_timer0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), + }, + .timer[1] = { + .regdma_entry_array = ledc_timer1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), + }, + .timer[2] = { + .regdma_entry_array = ledc_timer2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), + }, + .timer[3] = { + .regdma_entry_array = ledc_timer3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), + }, + .channel[0] = { + .regdma_entry_array = ledc_channel0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), + }, + .channel[1] = { + .regdma_entry_array = ledc_channel1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), + }, + .channel[2] = { + .regdma_entry_array = ledc_channel2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), + }, + .channel[3] = { + .regdma_entry_array = ledc_channel3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), + }, + .channel[4] = { + .regdma_entry_array = ledc_channel4_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), + }, + .channel[5] = { + .regdma_entry_array = ledc_channel5_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), + }, + .module_id = SLEEP_RETENTION_MODULE_LEDC, + } }; diff --git a/components/esp_hal_ledc/esp32c61/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32c61/include/hal/ledc_ll.h index e26e13b0c8e..e3f2d2e19e0 100644 --- a/components/esp_hal_ledc/esp32c61/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32c61/include/hal/ledc_ll.h @@ -19,8 +19,11 @@ #include "soc/soc_caps.h" #include "soc/soc_etm_source.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_GAMMA_RANGE0_DUTY_NUM_V) @@ -31,8 +34,13 @@ #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) #define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) // Channel tasks: ID, enable register and bit #define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \ @@ -496,12 +504,11 @@ static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step) { HAL_ASSERT(range < SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX); - ledc_channel_gamma_fade_param_t range_param = { - .duty_inc = dir, - .duty_cycle = cycle, - .scale = scale, - .duty_num = step, - }; + ledc_channel_gamma_fade_param_t range_param = {}; + range_param.duty_inc = dir; + range_param.duty_cycle = cycle; + range_param.scale = scale; + range_param.duty_num = step; LEDC_GAMMA_RAM.channel[channel_num].entry[range].val = range_param.val; } @@ -608,62 +615,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32c61/ledc_periph.c b/components/esp_hal_ledc/esp32c61/ledc_periph.c index 8e16e293615..bbcd7c2c13c 100644 --- a/components/esp_hal_ledc/esp32c61/ledc_periph.c +++ b/components/esp_hal_ledc/esp32c61/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,7 +13,10 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; @@ -122,50 +125,51 @@ static const regdma_entries_config_t ledc_channel3_regdma_entries[] = LEDC_CHANN static const regdma_entries_config_t ledc_channel4_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(4); static const regdma_entries_config_t ledc_channel5_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(5); -const ledc_reg_retention_info_t ledc_reg_retention_info = { - .common = { - .regdma_entry_array = ledc_common_regdma_entries, - .array_size = ARRAY_SIZE(ledc_common_regdma_entries), - }, - .timer[0] = { - .regdma_entry_array = ledc_timer0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), - }, - .timer[1] = { - .regdma_entry_array = ledc_timer1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), - }, - .timer[2] = { - .regdma_entry_array = ledc_timer2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), - }, - .timer[3] = { - .regdma_entry_array = ledc_timer3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), - }, - .channel[0] = { - .regdma_entry_array = ledc_channel0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), - }, - .channel[1] = { - .regdma_entry_array = ledc_channel1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), - }, - .channel[2] = { - .regdma_entry_array = ledc_channel2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), - }, - .channel[3] = { - .regdma_entry_array = ledc_channel3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), - }, - .channel[4] = { - .regdma_entry_array = ledc_channel4_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), - }, - .channel[5] = { - .regdma_entry_array = ledc_channel5_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), - }, - .module_id = SLEEP_RETENTION_MODULE_LEDC, +const ledc_reg_retention_info_t ledc_reg_retention_info[1] = {{ + .common = { + .regdma_entry_array = ledc_common_regdma_entries, + .array_size = ARRAY_SIZE(ledc_common_regdma_entries), + }, + .timer[0] = { + .regdma_entry_array = ledc_timer0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), + }, + .timer[1] = { + .regdma_entry_array = ledc_timer1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), + }, + .timer[2] = { + .regdma_entry_array = ledc_timer2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), + }, + .timer[3] = { + .regdma_entry_array = ledc_timer3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), + }, + .channel[0] = { + .regdma_entry_array = ledc_channel0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), + }, + .channel[1] = { + .regdma_entry_array = ledc_channel1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), + }, + .channel[2] = { + .regdma_entry_array = ledc_channel2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), + }, + .channel[3] = { + .regdma_entry_array = ledc_channel3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), + }, + .channel[4] = { + .regdma_entry_array = ledc_channel4_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), + }, + .channel[5] = { + .regdma_entry_array = ledc_channel5_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), + }, + .module_id = SLEEP_RETENTION_MODULE_LEDC, + } }; diff --git a/components/esp_hal_ledc/esp32h2/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32h2/include/hal/ledc_ll.h index 3a1aa53891c..0a19123d1e5 100644 --- a/components/esp_hal_ledc/esp32h2/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32h2/include/hal/ledc_ll.h @@ -20,8 +20,11 @@ #include "soc/soc_caps.h" #include "soc/soc_etm_source.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_GAMMA_DUTY_NUM_V) @@ -32,8 +35,13 @@ #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) #define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) // Channel tasks: ID, enable register and bit #define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \ @@ -729,62 +737,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32h2/ledc_periph.c b/components/esp_hal_ledc/esp32h2/ledc_periph.c index ca09e672c3e..0d09047c871 100644 --- a/components/esp_hal_ledc/esp32h2/ledc_periph.c +++ b/components/esp_hal_ledc/esp32h2/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,7 +13,10 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; @@ -111,50 +114,51 @@ static const regdma_entries_config_t ledc_channel3_regdma_entries[] = LEDC_CHANN static const regdma_entries_config_t ledc_channel4_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(4); static const regdma_entries_config_t ledc_channel5_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(5); -const ledc_reg_retention_info_t ledc_reg_retention_info = { - .common = { - .regdma_entry_array = ledc_common_regdma_entries, - .array_size = ARRAY_SIZE(ledc_common_regdma_entries), - }, - .timer[0] = { - .regdma_entry_array = ledc_timer0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), - }, - .timer[1] = { - .regdma_entry_array = ledc_timer1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), - }, - .timer[2] = { - .regdma_entry_array = ledc_timer2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), - }, - .timer[3] = { - .regdma_entry_array = ledc_timer3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), - }, - .channel[0] = { - .regdma_entry_array = ledc_channel0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), - }, - .channel[1] = { - .regdma_entry_array = ledc_channel1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), - }, - .channel[2] = { - .regdma_entry_array = ledc_channel2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), - }, - .channel[3] = { - .regdma_entry_array = ledc_channel3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), - }, - .channel[4] = { - .regdma_entry_array = ledc_channel4_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), - }, - .channel[5] = { - .regdma_entry_array = ledc_channel5_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), - }, - .module_id = SLEEP_RETENTION_MODULE_LEDC, +const ledc_reg_retention_info_t ledc_reg_retention_info[1] = {{ + .common = { + .regdma_entry_array = ledc_common_regdma_entries, + .array_size = ARRAY_SIZE(ledc_common_regdma_entries), + }, + .timer[0] = { + .regdma_entry_array = ledc_timer0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), + }, + .timer[1] = { + .regdma_entry_array = ledc_timer1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), + }, + .timer[2] = { + .regdma_entry_array = ledc_timer2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), + }, + .timer[3] = { + .regdma_entry_array = ledc_timer3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), + }, + .channel[0] = { + .regdma_entry_array = ledc_channel0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), + }, + .channel[1] = { + .regdma_entry_array = ledc_channel1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), + }, + .channel[2] = { + .regdma_entry_array = ledc_channel2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), + }, + .channel[3] = { + .regdma_entry_array = ledc_channel3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), + }, + .channel[4] = { + .regdma_entry_array = ledc_channel4_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), + }, + .channel[5] = { + .regdma_entry_array = ledc_channel5_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), + }, + .module_id = SLEEP_RETENTION_MODULE_LEDC, + } }; diff --git a/components/esp_hal_ledc/esp32h21/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32h21/include/hal/ledc_ll.h index 994b3fb60c3..027a0d5c38e 100644 --- a/components/esp_hal_ledc/esp32h21/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32h21/include/hal/ledc_ll.h @@ -20,8 +20,11 @@ #include "soc/soc_caps.h" #include "soc/soc_etm_source.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_GAMMA_DUTY_NUM_V) @@ -32,8 +35,13 @@ #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) #define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) // Channel tasks: ID, enable register and bit #define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \ @@ -728,62 +736,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-5), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32h21/ledc_periph.c b/components/esp_hal_ledc/esp32h21/ledc_periph.c index 2deb689613d..7bcb709d9db 100644 --- a/components/esp_hal_ledc/esp32h21/ledc_periph.c +++ b/components/esp_hal_ledc/esp32h21/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,7 +13,10 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; @@ -111,50 +114,51 @@ static const regdma_entries_config_t ledc_channel3_regdma_entries[] = LEDC_CHANN static const regdma_entries_config_t ledc_channel4_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(4); static const regdma_entries_config_t ledc_channel5_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(5); -const ledc_reg_retention_info_t ledc_reg_retention_info = { - .common = { - .regdma_entry_array = ledc_common_regdma_entries, - .array_size = ARRAY_SIZE(ledc_common_regdma_entries), - }, - .timer[0] = { - .regdma_entry_array = ledc_timer0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), - }, - .timer[1] = { - .regdma_entry_array = ledc_timer1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), - }, - .timer[2] = { - .regdma_entry_array = ledc_timer2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), - }, - .timer[3] = { - .regdma_entry_array = ledc_timer3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), - }, - .channel[0] = { - .regdma_entry_array = ledc_channel0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), - }, - .channel[1] = { - .regdma_entry_array = ledc_channel1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), - }, - .channel[2] = { - .regdma_entry_array = ledc_channel2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), - }, - .channel[3] = { - .regdma_entry_array = ledc_channel3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), - }, - .channel[4] = { - .regdma_entry_array = ledc_channel4_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), - }, - .channel[5] = { - .regdma_entry_array = ledc_channel5_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), - }, - .module_id = SLEEP_RETENTION_MODULE_LEDC, +const ledc_reg_retention_info_t ledc_reg_retention_info[1] = {{ + .common = { + .regdma_entry_array = ledc_common_regdma_entries, + .array_size = ARRAY_SIZE(ledc_common_regdma_entries), + }, + .timer[0] = { + .regdma_entry_array = ledc_timer0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), + }, + .timer[1] = { + .regdma_entry_array = ledc_timer1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), + }, + .timer[2] = { + .regdma_entry_array = ledc_timer2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), + }, + .timer[3] = { + .regdma_entry_array = ledc_timer3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), + }, + .channel[0] = { + .regdma_entry_array = ledc_channel0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), + }, + .channel[1] = { + .regdma_entry_array = ledc_channel1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), + }, + .channel[2] = { + .regdma_entry_array = ledc_channel2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), + }, + .channel[3] = { + .regdma_entry_array = ledc_channel3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), + }, + .channel[4] = { + .regdma_entry_array = ledc_channel4_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), + }, + .channel[5] = { + .regdma_entry_array = ledc_channel5_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), + }, + .module_id = SLEEP_RETENTION_MODULE_LEDC, + } }; diff --git a/components/esp_hal_ledc/esp32h4/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32h4/include/hal/ledc_ll.h index 08d7f9b160c..b4bd2b7171e 100644 --- a/components/esp_hal_ledc/esp32h4/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32h4/include/hal/ledc_ll.h @@ -19,8 +19,11 @@ #include "soc/soc_caps.h" #include "soc/soc_etm_source.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_FADE_PARAM_DUTY_NUM_V) @@ -31,8 +34,13 @@ #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) #define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0xffUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0xffUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) // Channel tasks: ID, enable register and bit #define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \ @@ -499,12 +507,11 @@ static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc */ static inline void ledc_ll_set_fade_param(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step) { - ledc_chn_fade_param_reg_t fade_param = { - .duty_inc = dir, - .duty_cycle = cycle, - .scale = scale, - .duty_num = step, - }; + ledc_chn_fade_param_reg_t fade_param = {}; + fade_param.duty_inc = dir; + fade_param.duty_cycle = cycle; + fade_param.scale = scale; + fade_param.duty_num = step; hw->channel_fade_param_group[speed_mode].channel[channel_num].fade_param.val = fade_param.val; } @@ -555,62 +562,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32h4/ledc_periph.c b/components/esp_hal_ledc/esp32h4/ledc_periph.c index ecff4c90811..8e033e06f2f 100644 --- a/components/esp_hal_ledc/esp32h4/ledc_periph.c +++ b/components/esp_hal_ledc/esp32h4/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,7 +13,10 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; @@ -125,58 +128,59 @@ static const regdma_entries_config_t ledc_channel5_regdma_entries[] = LEDC_CHANN static const regdma_entries_config_t ledc_channel6_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(6); static const regdma_entries_config_t ledc_channel7_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(7); -const ledc_reg_retention_info_t ledc_reg_retention_info = { - .common = { - .regdma_entry_array = ledc_common_regdma_entries, - .array_size = ARRAY_SIZE(ledc_common_regdma_entries), - }, - .timer[0] = { - .regdma_entry_array = ledc_timer0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), - }, - .timer[1] = { - .regdma_entry_array = ledc_timer1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), - }, - .timer[2] = { - .regdma_entry_array = ledc_timer2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), - }, - .timer[3] = { - .regdma_entry_array = ledc_timer3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), - }, - .channel[0] = { - .regdma_entry_array = ledc_channel0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), - }, - .channel[1] = { - .regdma_entry_array = ledc_channel1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), - }, - .channel[2] = { - .regdma_entry_array = ledc_channel2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), - }, - .channel[3] = { - .regdma_entry_array = ledc_channel3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), - }, - .channel[4] = { - .regdma_entry_array = ledc_channel4_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), - }, - .channel[5] = { - .regdma_entry_array = ledc_channel5_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), - }, - .channel[6] = { - .regdma_entry_array = ledc_channel6_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel6_regdma_entries), - }, - .channel[7] = { - .regdma_entry_array = ledc_channel7_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel7_regdma_entries), - }, - .module_id = SLEEP_RETENTION_MODULE_LEDC, +const ledc_reg_retention_info_t ledc_reg_retention_info[1] = {{ + .common = { + .regdma_entry_array = ledc_common_regdma_entries, + .array_size = ARRAY_SIZE(ledc_common_regdma_entries), + }, + .timer[0] = { + .regdma_entry_array = ledc_timer0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), + }, + .timer[1] = { + .regdma_entry_array = ledc_timer1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), + }, + .timer[2] = { + .regdma_entry_array = ledc_timer2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), + }, + .timer[3] = { + .regdma_entry_array = ledc_timer3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), + }, + .channel[0] = { + .regdma_entry_array = ledc_channel0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), + }, + .channel[1] = { + .regdma_entry_array = ledc_channel1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), + }, + .channel[2] = { + .regdma_entry_array = ledc_channel2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), + }, + .channel[3] = { + .regdma_entry_array = ledc_channel3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), + }, + .channel[4] = { + .regdma_entry_array = ledc_channel4_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), + }, + .channel[5] = { + .regdma_entry_array = ledc_channel5_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), + }, + .channel[6] = { + .regdma_entry_array = ledc_channel6_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel6_regdma_entries), + }, + .channel[7] = { + .regdma_entry_array = ledc_channel7_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel7_regdma_entries), + }, + .module_id = SLEEP_RETENTION_MODULE_LEDC, + } }; diff --git a/components/esp_hal_ledc/esp32p4/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32p4/include/hal/ledc_ll.h index c541fb45843..a187b5774bd 100644 --- a/components/esp_hal_ledc/esp32p4/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32p4/include/hal/ledc_ll.h @@ -19,8 +19,11 @@ #include "soc/soc_caps.h" #include "soc/soc_etm_source.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_GAMMA_RANGE0_DUTY_NUM_V) @@ -31,8 +34,13 @@ #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) #define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0xffUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0xffUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_CH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) // Channel tasks: ID, enable register and bit #define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \ @@ -521,12 +529,11 @@ static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step) { HAL_ASSERT(range < SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX); - ledc_channel_gamma_fade_param_t range_param = { - .duty_inc = dir, - .duty_cycle = cycle, - .scale = scale, - .duty_num = step, - }; + ledc_channel_gamma_fade_param_t range_param = {}; + range_param.duty_inc = dir; + range_param.duty_cycle = cycle; + range_param.scale = scale; + range_param.duty_num = step; LEDC_GAMMA_RAM.channel[channel_num].entry[range].val = range_param.val; } @@ -633,62 +640,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, low-speed mode only - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32p4/ledc_periph.c b/components/esp_hal_ledc/esp32p4/ledc_periph.c index b5de2ab6db1..432503fe8f3 100644 --- a/components/esp_hal_ledc/esp32p4/ledc_periph.c +++ b/components/esp_hal_ledc/esp32p4/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,7 +13,10 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT_PAD_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT_PAD_OUT0_IDX }, + }, } }; @@ -124,58 +127,59 @@ static const regdma_entries_config_t ledc_channel5_regdma_entries[] = LEDC_CHANN static const regdma_entries_config_t ledc_channel6_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(6); static const regdma_entries_config_t ledc_channel7_regdma_entries[] = LEDC_CHANNEL_RETENTION_ENTRIES(7); -const ledc_reg_retention_info_t ledc_reg_retention_info = { - .common = { - .regdma_entry_array = ledc_common_regdma_entries, - .array_size = ARRAY_SIZE(ledc_common_regdma_entries), - }, - .timer[0] = { - .regdma_entry_array = ledc_timer0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), - }, - .timer[1] = { - .regdma_entry_array = ledc_timer1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), - }, - .timer[2] = { - .regdma_entry_array = ledc_timer2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), - }, - .timer[3] = { - .regdma_entry_array = ledc_timer3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), - }, - .channel[0] = { - .regdma_entry_array = ledc_channel0_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), - }, - .channel[1] = { - .regdma_entry_array = ledc_channel1_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), - }, - .channel[2] = { - .regdma_entry_array = ledc_channel2_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), - }, - .channel[3] = { - .regdma_entry_array = ledc_channel3_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), - }, - .channel[4] = { - .regdma_entry_array = ledc_channel4_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), - }, - .channel[5] = { - .regdma_entry_array = ledc_channel5_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), - }, - .channel[6] = { - .regdma_entry_array = ledc_channel6_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel6_regdma_entries), - }, - .channel[7] = { - .regdma_entry_array = ledc_channel7_regdma_entries, - .array_size = ARRAY_SIZE(ledc_channel7_regdma_entries), - }, - .module_id = SLEEP_RETENTION_MODULE_LEDC, +const ledc_reg_retention_info_t ledc_reg_retention_info[1] = {{ + .common = { + .regdma_entry_array = ledc_common_regdma_entries, + .array_size = ARRAY_SIZE(ledc_common_regdma_entries), + }, + .timer[0] = { + .regdma_entry_array = ledc_timer0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer0_regdma_entries), + }, + .timer[1] = { + .regdma_entry_array = ledc_timer1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer1_regdma_entries), + }, + .timer[2] = { + .regdma_entry_array = ledc_timer2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer2_regdma_entries), + }, + .timer[3] = { + .regdma_entry_array = ledc_timer3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_timer3_regdma_entries), + }, + .channel[0] = { + .regdma_entry_array = ledc_channel0_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel0_regdma_entries), + }, + .channel[1] = { + .regdma_entry_array = ledc_channel1_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel1_regdma_entries), + }, + .channel[2] = { + .regdma_entry_array = ledc_channel2_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel2_regdma_entries), + }, + .channel[3] = { + .regdma_entry_array = ledc_channel3_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel3_regdma_entries), + }, + .channel[4] = { + .regdma_entry_array = ledc_channel4_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel4_regdma_entries), + }, + .channel[5] = { + .regdma_entry_array = ledc_channel5_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel5_regdma_entries), + }, + .channel[6] = { + .regdma_entry_array = ledc_channel6_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel6_regdma_entries), + }, + .channel[7] = { + .regdma_entry_array = ledc_channel7_regdma_entries, + .array_size = ARRAY_SIZE(ledc_channel7_regdma_entries), + }, + .module_id = SLEEP_RETENTION_MODULE_LEDC, + } }; diff --git a/components/esp_hal_ledc/esp32s2/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32s2/include/hal/ledc_ll.h index 098c591fcda..9a146c87011 100644 --- a/components/esp_hal_ledc/esp32s2/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32s2/include/hal/ledc_ll.h @@ -16,8 +16,11 @@ #include "soc/dport_reg.h" #include "hal/assert.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_DUTY_NUM_LSCH0_V) @@ -27,8 +30,13 @@ #define LEDC_LL_OVF_CNT_MAX (LEDC_OVF_NUM_LSCH0_V + 1) #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0xffUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0xffUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_LSCH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) #define LEDC_LL_GLOBAL_CLOCKS { \ LEDC_SLOW_CLK_APB, \ @@ -560,62 +568,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32s2/ledc_periph.c b/components/esp_hal_ledc/esp32s2/ledc_periph.c index 4dc339d2fa5..6c76cb8753a 100644 --- a/components/esp_hal_ledc/esp32s2/ledc_periph.c +++ b/components/esp_hal_ledc/esp32s2/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,6 +12,9 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; diff --git a/components/esp_hal_ledc/esp32s3/include/hal/ledc_ll.h b/components/esp_hal_ledc/esp32s3/include/hal/ledc_ll.h index 7752643db57..dadc3a7d935 100644 --- a/components/esp_hal_ledc/esp32s3/include/hal/ledc_ll.h +++ b/components/esp_hal_ledc/esp32s3/include/hal/ledc_ll.h @@ -16,8 +16,11 @@ #include "soc/system_struct.h" #include "hal/assert.h" +#define LEDC_LL_GET(attr) (LEDC_LL_ ## attr) + #define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL) +#define LEDC_LL_GROUP_NUM (1) #define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1 #define LEDC_LL_DUTY_NUM_MAX (LEDC_DUTY_NUM_LSCH0_V) @@ -27,8 +30,13 @@ #define LEDC_LL_OVF_CNT_MAX (LEDC_OVF_NUM_LSCH0_V + 1) #define LEDC_LL_FRACTIONAL_BITS (8) #define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1) -/// Get the mask of the fade end interrupt status register. -#define LEDC_LL_FADE_END_INTR_MASK (0xffUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S) + +/// Get the mask of the duty change end interrupt status register. +#define LEDC_LL_DUTY_CHANGE_END_INTR_MASK(speed_mode) (0xffUL << LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S) + +#define LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) BIT(LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel) BIT(LEDC_OVF_CNT_LSCH0_INT_ENA_S + (channel)) +#define LEDC_LL_EVENT_CHANNEL_MASK(speed_mode, channel) (LEDC_LL_EVENT_CHANNEL_DUTY_CHANGE_END(speed_mode, channel) | LEDC_LL_EVENT_CHANNEL_OVF_CNT(speed_mode, channel)) #define LEDC_LL_GLOBAL_CLOCKS { \ LEDC_SLOW_CLK_APB, \ @@ -525,62 +533,58 @@ static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode } /** - * @brief Set fade end interrupt enable + * @brief Enable LEDC interrupt for specific event mask * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None + * @param mask Interrupt enable mask + * @param enable True to enable, False to disable */ -static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en) +__attribute__((always_inline)) +static inline void ledc_ll_enable_interrupt(ledc_dev_t *hw, uint32_t mask, bool enable) { - uint32_t value = hw->int_ena.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num)))); + if (enable) { + hw->int_ena.val |= mask; + } else { + hw->int_ena.val &= ~mask; + } } /** - * @brief Get fade end interrupt status + * @brief Get interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param intr_status The fade end interrupt status * - * @return None + * @return Interrupt status. */ -static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status) +__attribute__((always_inline)) +static inline uint32_t ledc_ll_get_intr_status(ledc_dev_t *hw) { - uint32_t value = hw->int_st.val; - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - *intr_status = (value >> int_en_base) & 0xff; + return hw->int_st.val; } /** - * @brief Get the address of the fade end interrupt status register. + * @brief Get the address of the interrupt status register. * * @param hw Beginning address of the peripheral registers - * @return Pointer to the fade end interrupt status register. + * @return Pointer to the interrupt status register. */ -static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw) +static inline volatile void* ledc_ll_get_intr_status_reg(ledc_dev_t *hw) { - return &hw->int_st.val; + return (volatile void *)&hw->int_st; } /** - * @brief Clear fade end interrupt status + * @brief Clear interrupt status. * * @param hw Beginning address of the peripheral registers - * @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode - * @param channel_num LEDC channel index (0-7), select from ledc_channel_t + * @param intr_mask Interrupt status mask to clear * * @return None */ -static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num) +__attribute__((always_inline)) +static inline void ledc_ll_clear_intr_status(ledc_dev_t *hw, uint32_t intr_mask) { - uint32_t int_en_base = LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_S; - hw->int_clr.val = BIT(int_en_base + channel_num); + hw->int_clr.val = intr_mask; } /** diff --git a/components/esp_hal_ledc/esp32s3/ledc_periph.c b/components/esp_hal_ledc/esp32s3/ledc_periph.c index 4dc339d2fa5..6c76cb8753a 100644 --- a/components/esp_hal_ledc/esp32s3/ledc_periph.c +++ b/components/esp_hal_ledc/esp32s3/ledc_periph.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,6 +12,9 @@ */ const ledc_signal_conn_t ledc_periph_signal[1] = { { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + .irq_id = ETS_LEDC_INTR_SOURCE, + .speed_mode = { + [0] = { .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX }, + }, } }; diff --git a/components/esp_hal_ledc/include/hal/ledc_hal.h b/components/esp_hal_ledc/include/hal/ledc_hal.h index 886ad372347..c12f592423e 100644 --- a/components/esp_hal_ledc/include/hal/ledc_hal.h +++ b/components/esp_hal_ledc/include/hal/ledc_hal.h @@ -219,18 +219,6 @@ typedef struct { */ #define ledc_hal_set_idle_level(hal, speed_mode, channel_num, idle_level) ledc_ll_set_idle_level((hal)->dev, speed_mode, channel_num, idle_level) -/** - * @brief Set fade end interrupt enable - * - * @param hal Context of the HAL layer - * @param speed_mode LEDC speed_mode - * @param channel_num LEDC channel index, select from ledc_channel_t - * @param fade_end_intr_en The fade end interrupt enable status - * - * @return None - */ -#define ledc_hal_set_fade_end_intr(hal, speed_mode, channel_num, fade_end_intr_en) ledc_ll_set_fade_end_intr((hal)->dev, speed_mode, channel_num, fade_end_intr_en) - /** * @brief Set timer index of the specified channel * @@ -405,29 +393,6 @@ void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_mode_t speed_mode, le void ledc_hal_clear_left_off_fade_param(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t start_range); #endif //SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED -/** - * @brief Get interrupt status of the specified channel - * - * @param hal Context of the HAL layer - * @param speed_mode LEDC speed_mode - * @param channel_num LEDC channel index, select from ledc_channel_t - * @param intr_status Pointer to accept the interrupt status - * - * @return None - */ -void ledc_hal_get_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, uint32_t *intr_status); - -/** - * @brief Clear interrupt status of the specified channel - * - * @param hal Context of the HAL layer - * @param speed_mode LEDC speed_mode - * @param channel_num LEDC channel index, select from ledc_channel_t - * - * @return None - */ -void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num); - /** * @brief Get clock config of LEDC timer * @@ -440,17 +405,6 @@ void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t sp */ void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg); -/** - * @brief Get the address of the fade end interrupt status register. - * - * @param hal Context of the HAL layer - * @return Pointer to the fade end interrupt status register. - */ -static inline volatile void* ledc_hal_get_fade_end_intr_addr(ledc_hal_context_t *hal) -{ - return ledc_ll_get_fade_end_intr_addr(hal->dev); -} - #endif //#if SOC_LEDC_SUPPORTED #ifdef __cplusplus diff --git a/components/esp_hal_ledc/include/hal/ledc_periph.h b/components/esp_hal_ledc/include/hal/ledc_periph.h index 6f8825884f7..9a430cd7aca 100644 --- a/components/esp_hal_ledc/include/hal/ledc_periph.h +++ b/components/esp_hal_ledc/include/hal/ledc_periph.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,6 +7,11 @@ #pragma once #include "soc/soc_caps.h" +#include "soc/interrupts.h" +#if SOC_LEDC_SUPPORTED +#include "hal/ledc_ll.h" +#include "hal/ledc_types.h" +#endif #if SOC_PAU_SUPPORTED #include "soc/regdma.h" #include "soc/retention_periph_defs.h" @@ -16,18 +21,18 @@ extern "C" { #endif +#if SOC_LEDC_SUPPORTED /* Stores a bunch of per-ledc-peripheral data. */ typedef struct { - const int sig_out0_idx; + const int irq_id; + struct { + const int sig_out0_idx; + } speed_mode[LEDC_SPEED_MODE_MAX]; } ledc_signal_conn_t; -#if SOC_LEDC_SUPPORT_HS_MODE -extern const ledc_signal_conn_t ledc_periph_signal[2]; -#else -extern const ledc_signal_conn_t ledc_periph_signal[1]; -#endif +extern const ledc_signal_conn_t ledc_periph_signal[LEDC_LL_GET(GROUP_NUM)]; #if SOC_PAU_SUPPORTED && SOC_LEDC_SUPPORT_SLEEP_RETENTION @@ -53,8 +58,10 @@ typedef struct { const periph_retention_module_t module_id; } ledc_reg_retention_info_t; -extern const ledc_reg_retention_info_t ledc_reg_retention_info; -#endif +extern const ledc_reg_retention_info_t ledc_reg_retention_info[LEDC_LL_GET(GROUP_NUM)]; +#endif // SOC_PAU_SUPPORTED && SOC_LEDC_SUPPORT_SLEEP_RETENTION + +#endif // SOC_LEDC_SUPPORTED #ifdef __cplusplus } diff --git a/components/esp_hal_ledc/ledc_hal_iram.c b/components/esp_hal_ledc/ledc_hal_iram.c index ef3257014c5..958a01e6642 100644 --- a/components/esp_hal_ledc/ledc_hal_iram.c +++ b/components/esp_hal_ledc/ledc_hal_iram.c @@ -65,13 +65,3 @@ void ledc_hal_clear_left_off_fade_param(ledc_hal_context_t *hal, ledc_mode_t spe } } #endif //SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED - -void ledc_hal_get_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, uint32_t *intr_status) -{ - ledc_ll_get_fade_end_intr_status(hal->dev, speed_mode, intr_status); -} - -void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num) -{ - ledc_ll_clear_fade_end_intr_status(hal->dev, speed_mode, channel_num); -} diff --git a/components/soc/esp32/include/soc/clk_tree_defs.h b/components/soc/esp32/include/soc/clk_tree_defs.h index 0d5d3b71c14..e0f67b8552c 100644 --- a/components/soc/esp32/include/soc/clk_tree_defs.h +++ b/components/soc/esp32/include/soc/clk_tree_defs.h @@ -440,6 +440,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_APB, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_REF_TICK} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_APB_CLK", "LEDC_USE_RC_FAST_CLK", "LEDC_USE_REF_TICK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32c2/include/soc/clk_tree_defs.h b/components/soc/esp32c2/include/soc/clk_tree_defs.h index 11008f39be3..2441278132f 100644 --- a/components/soc/esp32c2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c2/include/soc/clk_tree_defs.h @@ -293,6 +293,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F60M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32c3/include/soc/clk_tree_defs.h b/components/soc/esp32c3/include/soc/clk_tree_defs.h index e3d505f96c9..baf0e6abbe0 100644 --- a/components/soc/esp32c3/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c3/include/soc/clk_tree_defs.h @@ -353,6 +353,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_APB, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_APB_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32c5/include/soc/clk_tree_defs.h b/components/soc/esp32c5/include/soc/clk_tree_defs.h index d24c507705f..8498b001dea 100644 --- a/components/soc/esp32c5/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c5/include/soc/clk_tree_defs.h @@ -489,6 +489,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32c6/include/soc/clk_tree_defs.h b/components/soc/esp32c6/include/soc/clk_tree_defs.h index f47c339c026..298699f4c70 100644 --- a/components/soc/esp32c6/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c6/include/soc/clk_tree_defs.h @@ -468,6 +468,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32c61/include/soc/clk_tree_defs.h b/components/soc/esp32c61/include/soc/clk_tree_defs.h index 473a984d455..a34a8cb5f01 100644 --- a/components/soc/esp32c61/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c61/include/soc/clk_tree_defs.h @@ -338,6 +338,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32h2/include/soc/clk_tree_defs.h b/components/soc/esp32h2/include/soc/clk_tree_defs.h index 166de692973..a251dd2676d 100644 --- a/components/soc/esp32h2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32h2/include/soc/clk_tree_defs.h @@ -462,6 +462,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F96M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32h21/include/soc/clk_tree_defs.h b/components/soc/esp32h21/include/soc/clk_tree_defs.h index ab9fad7e59c..53eef1d9af2 100644 --- a/components/soc/esp32h21/include/soc/clk_tree_defs.h +++ b/components/soc/esp32h21/include/soc/clk_tree_defs.h @@ -362,6 +362,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F96M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32h4/include/soc/clk_tree_defs.h b/components/soc/esp32h4/include/soc/clk_tree_defs.h index bb71e89372b..62c55acf435 100644 --- a/components/soc/esp32h4/include/soc/clk_tree_defs.h +++ b/components/soc/esp32h4/include/soc/clk_tree_defs.h @@ -357,6 +357,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F96M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32p4/include/soc/clk_tree_defs.h b/components/soc/esp32p4/include/soc/clk_tree_defs.h index eb571f4a13e..8bbbc97a6b8 100644 --- a/components/soc/esp32p4/include/soc/clk_tree_defs.h +++ b/components/soc/esp32p4/include/soc/clk_tree_defs.h @@ -709,6 +709,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_PLL_DIV_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32s2/include/soc/clk_tree_defs.h b/components/soc/esp32s2/include/soc/clk_tree_defs.h index 2404b51c595..a26a2e0e488 100644 --- a/components/soc/esp32s2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32s2/include/soc/clk_tree_defs.h @@ -425,6 +425,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_APB, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_REF_TICK} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_APB_CLK", "LEDC_USE_RC_FAST_CLK", "LEDC_USE_REF_TICK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver diff --git a/components/soc/esp32s3/include/soc/clk_tree_defs.h b/components/soc/esp32s3/include/soc/clk_tree_defs.h index 2c135512822..642e462810a 100644 --- a/components/soc/esp32s3/include/soc/clk_tree_defs.h +++ b/components/soc/esp32s3/include/soc/clk_tree_defs.h @@ -460,6 +460,7 @@ typedef enum { * @brief Array initializer for all supported clock sources of LEDC */ #define SOC_LEDC_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_APB, SOC_MOD_CLK_RC_FAST} +#define SOC_LEDC_CLK_STRS {"LEDC_USE_XTAL_CLK", "LEDC_USE_APB_CLK", "LEDC_USE_RC_FAST_CLK"} /** * @brief Type of LEDC clock source, reserved for the legacy LEDC driver