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feat(efuse): Update efuse table for ESP32-H4

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This commit is contained in:
Konstantin Kondrashov
2026-04-01 16:15:45 +03:00
parent 1c43172477
commit 8701705ec3
14 changed files with 1972 additions and 408 deletions
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components/efuse/esp32h4/esp_efuse_table.csv
+86 -1
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@@ -9,7 +9,7 @@
# this will generate new source files, next rebuild all the sources.
# !!!!!!!!!!! #
# This file was generated by regtools.py based on the efuses.yaml file with the version: 7bc342bad0952907e1db21112d258c6b
# This file was generated by regtools.py based on the efuses.yaml file with the version: 6c3ca4b9e6c9ee71a1a0627fa77a905a
WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses
WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
@@ -27,6 +27,8 @@ WR_DIS.DIS_TWAI, EFUSE_BLK0, 2, 1, [] wr_dis
WR_DIS.JTAG_SEL_ENABLE, EFUSE_BLK0, 2, 1, [] wr_dis of JTAG_SEL_ENABLE
WR_DIS.DIS_PAD_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_PAD_JTAG
WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
WR_DIS.PVT_GLITCH_EN, EFUSE_BLK0, 2, 1, [] wr_dis of PVT_GLITCH_EN
WR_DIS.PVT_GLITCH_MODE, EFUSE_BLK0, 2, 1, [] wr_dis of PVT_GLITCH_MODE
WR_DIS.SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 4, 1, [] wr_dis of SPI_BOOT_CRYPT_CNT
WR_DIS.SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 5, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
WR_DIS.SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 6, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
@@ -41,6 +43,7 @@ WR_DIS.SEC_DPA_LEVEL, EFUSE_BLK0, 14, 1, [] wr_dis
WR_DIS.XTS_DPA_PSEUDO_LEVEL, EFUSE_BLK0, 14, 1, [] wr_dis of XTS_DPA_PSEUDO_LEVEL
WR_DIS.XTS_DPA_CLK_ENABLE, EFUSE_BLK0, 14, 1, [] wr_dis of XTS_DPA_CLK_ENABLE
WR_DIS.ECC_FORCE_CONST_TIME, EFUSE_BLK0, 14, 1, [] wr_dis of ECC_FORCE_CONST_TIME
WR_DIS.SECURE_BOOT_SHA384_EN, EFUSE_BLK0, 14, 1, [] wr_dis of SECURE_BOOT_SHA384_EN
WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, [] wr_dis of SECURE_BOOT_EN
WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 16, 1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
WR_DIS.FLASH_TPUW, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TPUW
@@ -65,7 +68,47 @@ WR_DIS.HYS_EN_PAD, EFUSE_BLK0, 20, 1, [] wr_dis
WR_DIS.PVT_GLITCH_CHARGE_RESET, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_GLITCH_CHARGE_RESET
WR_DIS.VDD_SPI_LDO_ADJUST, EFUSE_BLK0, 20, 1, [] wr_dis of VDD_SPI_LDO_ADJUST
WR_DIS.FLASH_LDO_POWER_SEL, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_LDO_POWER_SEL
WR_DIS.WAFER_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR
WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR
WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR
WR_DIS.BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MAJOR
WR_DIS.FLASH_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_CAP
WR_DIS.FLASH_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_VENDOR
WR_DIS.PSRAM_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_CAP
WR_DIS.PSRAM_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_VENDOR
WR_DIS.TEMP, EFUSE_BLK0, 20, 1, [] wr_dis of TEMP
WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION
WR_DIS.PVT_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_DBIAS
WR_DIS.ADJUST_1V2, EFUSE_BLK0, 20, 1, [] wr_dis of ADJUST_1V2
WR_DIS.ADJUST_1V8, EFUSE_BLK0, 20, 1, [] wr_dis of ADJUST_1V8
WR_DIS.ACTIVE_DCDC_1V25, EFUSE_BLK0, 20, 1, [] wr_dis of ACTIVE_DCDC_1V25
WR_DIS.ACTIVE_DCDC_1V35, EFUSE_BLK0, 20, 1, [] wr_dis of ACTIVE_DCDC_1V35
WR_DIS.SLP_DCDC, EFUSE_BLK0, 20, 1, [] wr_dis of SLP_DCDC
WR_DIS.LSLP_HP_DRVB, EFUSE_BLK0, 20, 1, [] wr_dis of LSLP_HP_DRVB
WR_DIS.DSLP_LP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of DSLP_LP_DBIAS
WR_DIS.TEMP_CALIB, EFUSE_BLK0, 20, 1, [] wr_dis of TEMP_CALIB
WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2
WR_DIS.OPTIONAL_UNIQUE_ID, EFUSE_BLK0, 21, 1, [] wr_dis of OPTIONAL_UNIQUE_ID
WR_DIS.OCODE, EFUSE_BLK0, 21, 1, [] wr_dis of OCODE
WR_DIS.DCDC_OCODE, EFUSE_BLK0, 21, 1, [] wr_dis of DCDC_OCODE
WR_DIS.VDD_3V4_DOUT, EFUSE_BLK0, 21, 1, [] wr_dis of VDD_3V4_DOUT
WR_DIS.ADC1_AVE_INITCODE_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN0
WR_DIS.ADC1_AVE_INITCODE_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN1
WR_DIS.ADC1_AVE_INITCODE_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN2
WR_DIS.ADC1_AVE_INITCODE_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN3
WR_DIS.ADC1_HI_DOUT_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN0
WR_DIS.ADC1_HI_DOUT_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN1
WR_DIS.ADC1_HI_DOUT_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN2
WR_DIS.ADC1_HI_DOUT_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN3
WR_DIS.ADC1_CH0_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH1_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH2_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH3_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH4_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH4_ATTEN0_INITCODE_DIFF
WR_DIS.INITCODE_DIFF_1P8_3P3, EFUSE_BLK0, 21, 1, [] wr_dis of INITCODE_DIFF_1P8_3P3
WR_DIS.HI_DOUT_DIFF_1P8_3P3, EFUSE_BLK0, 21, 1, [] wr_dis of HI_DOUT_DIFF_1P8_3P3
WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
@@ -76,6 +119,8 @@ WR_DIS.BLOCK_KEY4, EFUSE_BLK0, 27, 1, [WR_DIS.K
WR_DIS.BLOCK_KEY5, EFUSE_BLK0, 28, 1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
WR_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 29, 1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
WR_DIS.USB_EXCHG_PINS, EFUSE_BLK0, 30, 1, [] wr_dis of USB_EXCHG_PINS
WR_DIS.USB_OTG_FS_EXCHG_PINS, EFUSE_BLK0, 30, 1, [] wr_dis of USB_OTG_FS_EXCHG_PINS
WR_DIS.USB_PHY_SEL, EFUSE_BLK0, 30, 1, [] wr_dis of USB_PHY_SEL
WR_DIS.SOFT_DIS_JTAG, EFUSE_BLK0, 31, 1, [] wr_dis of SOFT_DIS_JTAG
RD_DIS, EFUSE_BLK0, 32, 7, [] Disable reading from BlOCK4-10
RD_DIS.BLOCK_KEY0, EFUSE_BLK0, 32, 1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
@@ -154,6 +199,46 @@ HYS_EN_PAD, EFUSE_BLK1, 102, 1, [] Repres
PVT_GLITCH_CHARGE_RESET, EFUSE_BLK1, 103, 1, [] Represents whether to trigger reset or charge pump when PVT power glitch happened.1:Trigger charge pump. 0:Trigger reset
VDD_SPI_LDO_ADJUST, EFUSE_BLK1, 105, 8, [] Represents configuration of FLASH LDO mode and voltage.
FLASH_LDO_POWER_SEL, EFUSE_BLK1, 113, 1, [] Represents which flash ldo be select: 1: FLASH LDO 1P2 0 : FLASH LDO 1P8
WAFER_VERSION_MINOR, EFUSE_BLK1, 114, 4, [] Minor chip version
WAFER_VERSION_MAJOR, EFUSE_BLK1, 118, 2, [] Major chip version
DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK1, 120, 1, [] Disables check of wafer version major
DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK1, 121, 1, [] Disables check of blk version major
BLK_VERSION_MINOR, EFUSE_BLK1, 122, 3, [] BLK_VERSION_MINOR of BLOCK2
BLK_VERSION_MAJOR, EFUSE_BLK1, 125, 2, [] BLK_VERSION_MAJOR of BLOCK2
FLASH_CAP, EFUSE_BLK1, 127, 3, [] Flash capacity
FLASH_VENDOR, EFUSE_BLK1, 130, 3, [] Flash vendor
PSRAM_CAP, EFUSE_BLK1, 133, 3, [] Psram capacity
PSRAM_VENDOR, EFUSE_BLK1, 136, 2, [] Psram vendor
TEMP, EFUSE_BLK1, 138, 2, [] Temp (die embedded inside)
PKG_VERSION, EFUSE_BLK1, 140, 3, [] Package version
PVT_DBIAS, EFUSE_BLK1, 143, 5, [] PVT DBIAS
ADJUST_1V2, EFUSE_BLK1, 148, 4, [] SPI LDO adjust of 1.2v
ADJUST_1V8, EFUSE_BLK1, 152, 4, [] SPI LDO adjust of 1.8v
ACTIVE_DCDC_1V25, EFUSE_BLK1, 156, 4, [] DCDC-DCDC DBIAS of 1.25v
ACTIVE_DCDC_1V35, EFUSE_BLK1, 160, 4, [] DCDC-DCDC DBIAS of 1.35v
SLP_DCDC, EFUSE_BLK1, 164, 5, [] DCDC DBIAS in sleep
LSLP_HP_DRVB, EFUSE_BLK1, 169, 5, [] HP DRVB in light sleep
DSLP_LP_DBIAS, EFUSE_BLK1, 174, 2, [] LP DBIAS in deep sleep
TEMP_CALIB, EFUSE_BLK1, 176, 10, [] Temperature calibration data
OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, [] Optional unique 128-bit ID
OCODE, EFUSE_BLK2, 128, 8, [] ADC OCode
DCDC_OCODE, EFUSE_BLK2, 136, 8, [] DCDC OCode
VDD_3V4_DOUT, EFUSE_BLK2, 144, 10, [] ADC dout of vdd 3.4v
ADC1_AVE_INITCODE_ATTEN0, EFUSE_BLK2, 154, 9, [] Average initcode of ADC1 atten0
ADC1_AVE_INITCODE_ATTEN1, EFUSE_BLK2, 163, 9, [] Average initcode of ADC1 atten1
ADC1_AVE_INITCODE_ATTEN2, EFUSE_BLK2, 172, 9, [] Average initcode of ADC1 atten2
ADC1_AVE_INITCODE_ATTEN3, EFUSE_BLK2, 181, 9, [] Average initcode of ADC1 atten3
ADC1_HI_DOUT_ATTEN0, EFUSE_BLK2, 190, 9, [] HI dout of ADC1 atten0
ADC1_HI_DOUT_ATTEN1, EFUSE_BLK2, 199, 9, [] HI dout of ADC1 atten1
ADC1_HI_DOUT_ATTEN2, EFUSE_BLK2, 208, 9, [] HI dout of ADC1 atten2
ADC1_HI_DOUT_ATTEN3, EFUSE_BLK2, 217, 9, [] HI dout of ADC1 atten3
ADC1_CH0_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 226, 3, [] Gap between ADC1 CH0 and average initcode
ADC1_CH1_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 229, 3, [] Gap between ADC1 CH1 and average initcode
ADC1_CH2_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 232, 3, [] Gap between ADC1 CH2 and average initcode
ADC1_CH3_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 235, 3, [] Gap between ADC1 CH3 and average initcode
ADC1_CH4_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 238, 3, [] Gap between ADC1 CH4 and average initcode
INITCODE_DIFF_1P8_3P3, EFUSE_BLK2, 241, 5, [] Initcode diff between IO LDO 1.8v and 3.3v
HI_DOUT_DIFF_1P8_3P3, EFUSE_BLK2, 246, 5, [] HI dout diff between IO LDO 1.8v and 3.3v
USER_DATA, EFUSE_BLK3, 0, 256, [BLOCK_USR_DATA] User data
USER_DATA.MAC_CUSTOM, EFUSE_BLK3, 200, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
KEY0, EFUSE_BLK4, 0, 256, [BLOCK_KEY0] Key0 or user data
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