Merge branch 'fix/esp32p4_rev3_hardware_issue_workarounds_v6.0' into 'release/v6.0'

fix(esp_hw_support): esp32p4 eco5 hardware issues workaround (v6.0)

See merge request espressif/esp-idf!42941

components/esp_hw_support/port/esp32p4/pmu_init.c

@@ -14,9 +14,11 @@
 #include "soc/pmu_struct.h"
 #include "hal/efuse_hal.h"
 #include "hal/pmu_hal.h"
+#include "hal/lp_sys_ll.h"
 #include "pmu_param.h"
 #include "esp_private/esp_pmu.h"
 #include "soc/regi2c_dig_reg.h"
+#include "soc/lp_system_reg.h"
 #include "regi2c_ctrl.h"
 #include "esp_rom_sys.h"
 #include "soc/rtc.h"
@@ -175,6 +177,9 @@ static void pmu_hp_system_init_default(pmu_context_t *ctx)
         pmu_hp_system_param_default(mode, &param);
         pmu_hp_system_init(ctx, mode, &param);
     }
+#if CONFIG_ESP32P4_REV_MIN_FULL >= 300
+    lp_sys_ll_set_hp_mem_lowpower_mode(MEM_AUX_DEEPSLEEP);
+#endif
 }
 
 static inline void pmu_lp_system_param_default(pmu_lp_mode_t mode, pmu_lp_system_param_t *param)
@@ -191,6 +196,9 @@ static void pmu_lp_system_init_default(pmu_context_t *ctx)
         pmu_lp_system_param_default(mode, &param);
         pmu_lp_system_init(ctx, mode, &param);
     }
+#if CONFIG_ESP32P4_REV_MIN_FULL >= 300
+    lp_sys_ll_set_lp_mem_lowpower_mode(MEM_AUX_DEEPSLEEP);
+#endif
 }
 
 void pmu_init(void)

components/esp_hw_support/port/esp32p4/pmu_sleep.c

@@ -30,6 +30,7 @@
 #include "hal/pmu_hal.h"
 #include "hal/psram_ctrlr_ll.h"
 #include "hal/lp_sys_ll.h"
+#include "hal/lp_clkrst_ll.h"
 #include "esp_private/esp_pmu.h"
 #include "pmu_param.h"
 #include "esp_rom_sys.h"
@@ -39,6 +40,12 @@
 #include "hal/ldo_ll.h"
 #endif
 
+#if (CONFIG_ESP_REV_MIN_FULL == 300)
+#include "soc/hp_system_reg.h"
+#include "hal/mmu_ll.h"
+#include "hal/mspi_ll.h"
+#endif
+
 #define HP(state)   (PMU_MODE_HP_ ## state)
 #define LP(state)   (PMU_MODE_LP_ ## state)
 
@@ -205,7 +212,6 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
         }
         power_default.hp_sys.dig_power.dcdc_switch_pd_en = 0;
         analog_default.hp_sys.analog.dcm_vset = CONFIG_ESP_SLEEP_DCM_VSET_VAL_IN_SLEEP;
-        analog_default.hp_sys.analog.xpd = 0;
         if (sleep_flags & PMU_SLEEP_PD_VDDSDIO) {
             analog_default.hp_sys.analog.xpd_0p1a = 0;
         } else {
@@ -415,6 +421,10 @@ TCM_IRAM_ATTR uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt,
 #endif
             rtc_clk_mpll_disable();
         }
+    } else {
+#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
+        lp_clkrst_ll_boot_from_lp_ram(true);
+#endif
     }
 
 
@@ -438,12 +448,16 @@ TCM_IRAM_ATTR uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt,
         ;
     }
 
-#if CONFIG_SPIRAM && CONFIG_ESP_LDO_RESERVE_PSRAM
-    // Enable PSRAM chip power supply after deepsleep request rejected
     if (dslp) {
+#if CONFIG_SPIRAM && CONFIG_ESP_LDO_RESERVE_PSRAM
+        // Enable PSRAM chip power supply after deepsleep request rejected
         ldo_ll_enable(LDO_ID2UNIT(CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN), true);
-    }
 #endif
+#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
+        // Set reset vector back to HP ROM after deepsleep request rejected
+        lp_clkrst_ll_boot_from_lp_ram(false);
+#endif
+    }
 
     return pmu_sleep_finish(dslp);
 }

components/esp_hw_support/port/esp32p4/private_include/pmu_param.h

@@ -35,7 +35,7 @@ extern "C" {
 // FOR LIGHTSLEEP
 #define PMU_HP_DRVB_LIGHTSLEEP      0
 #define PMU_LP_DRVB_LIGHTSLEEP      0
-#define PMU_HP_XPD_LIGHTSLEEP       1
+#define PMU_HP_XPD_LIGHTSLEEP       0 // Always use DCDC power supply in lightsleep
 
 #define PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT    0
 #define PMU_HP_DBIAS_LIGHTSLEEP_0V6 1

components/esp_hw_support/port/pau_regdma.c

@@ -137,8 +137,10 @@ void IRAM_ATTR pau_regdma_trigger_extra_link_restore(void)
 }
 
 #if SOC_PAU_IN_TOP_DOMAIN
-void pau_regdma_enable_aon_link_entry(bool enable)
+bool IRAM_ATTR pau_regdma_enable_aon_link_entry(bool enable)
 {
+    bool origin_bypass_en = lp_sys_ll_get_pau_aon_bypass();
     lp_sys_ll_set_pau_aon_bypass(enable);
+    return origin_bypass_en;
 }
 #endif