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feat(i2s): support i2s etm event and task

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This commit is contained in:
laokaiyao
2024-07-25 13:22:38 +08:00
parent 5c3964c9ea
commit 86a552e4e2
23 changed files with 895 additions and 61 deletions
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components/hal/esp32c5/include/hal/etm_ll.h
+2
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@@ -19,6 +19,8 @@
extern "C" {
#endif
#define ETM_LL_SUPPORT_STATUS 1 // Support to get and clear the status of the ETM event and task
/**
* @brief Enable the clock for ETM register
*
components/hal/esp32c5/include/hal/i2s_ll.h
+125
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@@ -19,6 +19,8 @@
#include "soc/i2s_periph.h"
#include "soc/i2s_struct.h"
#include "soc/pcr_struct.h"
#include "soc/soc_etm_struct.h"
#include "soc/soc_etm_source.h"
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
@@ -28,6 +30,7 @@ extern "C" {
#endif
#define I2S_LL_GET_HW(num) (((num) == 0)? (&I2S0) : NULL)
#define I2S_LL_GET_ID(hw) (((hw) == &I2S0)? 0 : -1)
#define I2S_LL_TDM_CH_MASK (0xffff)
#define I2S_LL_PDM_BCK_FACTOR (64)
@@ -38,6 +41,30 @@ extern "C" {
#define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz
#define I2S_LL_DEFAULT_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT
#define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_EVENT_MAX]){{ \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S0_EVT_RX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_RECEIVED, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S0_EVT_TX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_SENT, \
}}}[i2s_port][(chan_dir) - 1][event]
#define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_TASK_MAX]){{ \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_TASK_START] = I2S0_TASK_START_RX, \
[I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_RX, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_TASK_START] = I2S0_TASK_START_TX, \
[I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_TX, \
}}}[i2s_port][(chan_dir) - 1][task]
#define I2S_LL_ETM_MAX_THRESH_NUM (0x3FFFUL)
/**
* @brief Enable the bus clock for I2S module
*
@@ -1191,6 +1218,104 @@ static inline uint32_t i2s_ll_tx_get_bclk_sync_count(i2s_dev_t *hw)
return hw->bck_cnt.tx_bck_cnt;
}
/**
* @brief Set the TX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that send, in words (4 bytes)
*/
static inline void i2s_ll_tx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_tx_send_word_num = thresh;
}
/**
* @brief Set the RX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that received, in words (4 bytes)
*/
static inline void i2s_ll_rx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_rx_receive_word_num = thresh;
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_tx_done_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st3.i2s0_evt_tx_done_st;
default:
HAL_ASSERT(false);
}
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_rx_done_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st3.i2s0_evt_rx_done_st;
default:
HAL_ASSERT(false);
}
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_tx_threshold_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st3.i2s0_evt_x_words_sent_st;
default:
HAL_ASSERT(false);
}
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_rx_threshold_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st3.i2s0_evt_x_words_received_st;
default:
HAL_ASSERT(false);
}
}
#ifdef __cplusplus
}
#endif
components/hal/esp32c6/include/hal/i2s_ll.h
+57 -10
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -18,6 +18,7 @@
#include "soc/i2s_periph.h"
#include "soc/i2s_struct.h"
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
@@ -37,6 +38,30 @@ extern "C" {
#define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz
#define I2S_LL_DEFAULT_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT
#define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_EVENT_MAX]){{ \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S_EVT_RX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_RECEIVED, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S_EVT_TX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_SENT, \
}}}[i2s_port][(chan_dir) - 1][event]
#define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_TASK_MAX]){{ \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_TASK_START] = I2S_TASK_START_RX, \
[I2S_ETM_TASK_STOP] = I2S_TASK_STOP_RX, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_TASK_START] = I2S_TASK_START_TX, \
[I2S_ETM_TASK_STOP] = I2S_TASK_STOP_TX, \
}}}[i2s_port][(chan_dir) - 1][task]
#define I2S_LL_ETM_MAX_THRESH_NUM (0x3FFUL)
/**
*
* @param i2s_id The port id of I2S
@@ -460,7 +485,7 @@ static inline void i2s_ll_rx_set_eof_num(i2s_dev_t *hw, int eof_num)
}
/**
* @brief Congfigure TX chan bit and audio data bit
* @brief Configure TX chan bit and audio data bit
*
* @param hw Peripheral I2S hardware instance address.
* @param chan_bit The chan bit width
@@ -473,7 +498,7 @@ static inline void i2s_ll_tx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int
}
/**
* @brief Congfigure RX chan bit and audio data bit
* @brief Configure RX chan bit and audio data bit
*
* @param hw Peripheral I2S hardware instance address.
* @param chan_bit The chan bit width
@@ -873,11 +898,11 @@ static inline void i2s_ll_tx_set_pdm_fpfs(i2s_dev_t *hw, uint32_t fp, uint32_t f
}
/**
* @brief Get I2S TX PDM fp configuration paramater
* @brief Get I2S TX PDM fp configuration parameter
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - fp configuration paramater
* - fp configuration parameter
*/
static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
{
@@ -885,11 +910,11 @@ static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
}
/**
* @brief Get I2S TX PDM fs configuration paramater
* @brief Get I2S TX PDM fs configuration parameter
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - fs configuration paramater
* - fs configuration parameter
*/
static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
{
@@ -915,7 +940,7 @@ static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
* @brief Configura TX a/u-law decompress or compress
*
* @param hw Peripheral I2S hardware instance address.
* @param pcm_cfg PCM configuration paramater
* @param pcm_cfg PCM configuration parameter
*/
static inline void i2s_ll_tx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
{
@@ -927,7 +952,7 @@ static inline void i2s_ll_tx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_
* @brief Configure RX a/u-law decompress or compress
*
* @param hw Peripheral I2S hardware instance address.
* @param pcm_cfg PCM configuration paramater
* @param pcm_cfg PCM configuration parameter
*/
static inline void i2s_ll_rx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
{
@@ -1099,7 +1124,7 @@ static inline void i2s_ll_tx_pdm_dma_take_mode(i2s_dev_t *hw, bool is_mono, bool
* @param is_mono The DMA data only has one slot (mono) or contains two slots (stereo)
* @param is_copy Whether the un-selected slot copies the data from the selected one
* If not, the un-selected slot will transmit the data from 'conf_single_data'
* @param mask The slot mask to selet the slot
* @param mask The slot mask to select the slot
*/
static inline void i2s_ll_tx_pdm_slot_mode(i2s_dev_t *hw, bool is_mono, bool is_copy, i2s_pdm_slot_mask_t mask)
{
@@ -1132,6 +1157,28 @@ static inline void i2s_ll_tx_pdm_line_mode(i2s_dev_t *hw, i2s_pdm_tx_line_mode_t
hw->tx_pcm2pdm_conf.tx_pdm_dac_2out_en = line_mode != I2S_PDM_TX_ONE_LINE_DAC;
}
/**
* @brief Set the TX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that send
*/
static inline void i2s_ll_tx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_tx_send_word_num = thresh;
}
/**
* @brief Set the RX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that received
*/
static inline void i2s_ll_rx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_rx_receive_word_num = thresh;
}
#ifdef __cplusplus
}
#endif
components/hal/esp32h2/include/hal/i2s_ll.h
+57 -10
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -18,6 +18,7 @@
#include "soc/i2s_periph.h"
#include "soc/i2s_struct.h"
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
@@ -38,6 +39,30 @@ extern "C" {
#define I2S_LL_PLL_F64M_CLK_FREQ (64 * 1000000) // PLL_F64M_CLK: 64MHz
#define I2S_LL_DEFAULT_CLK_FREQ I2S_LL_PLL_F96M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT
#define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_EVENT_MAX]){{ \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S_EVT_RX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_RECEIVED, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S_EVT_TX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_SENT, \
}}}[i2s_port][(chan_dir) - 1][event]
#define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_TASK_MAX]){{ \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_TASK_START] = I2S_TASK_START_RX, \
[I2S_ETM_TASK_STOP] = I2S_TASK_STOP_RX, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_TASK_START] = I2S_TASK_START_TX, \
[I2S_ETM_TASK_STOP] = I2S_TASK_STOP_TX, \
}}}[i2s_port][(chan_dir) - 1][task]
#define I2S_LL_ETM_MAX_THRESH_NUM (0x3FFUL)
/**
*
* @param i2s_id The port id of I2S
@@ -467,7 +492,7 @@ static inline void i2s_ll_rx_set_eof_num(i2s_dev_t *hw, int eof_num)
}
/**
* @brief Congfigure TX chan bit and audio data bit
* @brief Configure TX chan bit and audio data bit
*
* @param hw Peripheral I2S hardware instance address.
* @param chan_bit The chan bit width
@@ -480,7 +505,7 @@ static inline void i2s_ll_tx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int
}
/**
* @brief Congfigure RX chan bit and audio data bit
* @brief Configure RX chan bit and audio data bit
*
* @param hw Peripheral I2S hardware instance address.
* @param chan_bit The chan bit width
@@ -880,11 +905,11 @@ static inline void i2s_ll_tx_set_pdm_fpfs(i2s_dev_t *hw, uint32_t fp, uint32_t f
}
/**
* @brief Get I2S TX PDM fp configuration paramater
* @brief Get I2S TX PDM fp configuration parameter
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - fp configuration paramater
* - fp configuration parameter
*/
static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
{
@@ -892,11 +917,11 @@ static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
}
/**
* @brief Get I2S TX PDM fs configuration paramater
* @brief Get I2S TX PDM fs configuration parameter
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - fs configuration paramater
* - fs configuration parameter
*/
static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
{
@@ -922,7 +947,7 @@ static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
* @brief Configura TX a/u-law decompress or compress
*
* @param hw Peripheral I2S hardware instance address.
* @param pcm_cfg PCM configuration paramater
* @param pcm_cfg PCM configuration parameter
*/
static inline void i2s_ll_tx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
{
@@ -934,7 +959,7 @@ static inline void i2s_ll_tx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_
* @brief Configure RX a/u-law decompress or compress
*
* @param hw Peripheral I2S hardware instance address.
* @param pcm_cfg PCM configuration paramater
* @param pcm_cfg PCM configuration parameter
*/
static inline void i2s_ll_rx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
{
@@ -1106,7 +1131,7 @@ static inline void i2s_ll_tx_pdm_dma_take_mode(i2s_dev_t *hw, bool is_mono, bool
* @param is_mono The DMA data only has one slot (mono) or contains two slots (stereo)
* @param is_copy Whether the un-selected slot copies the data from the selected one
* If not, the un-selected slot will transmit the data from 'conf_single_data'
* @param mask The slot mask to selet the slot
* @param mask The slot mask to select the slot
*/
static inline void i2s_ll_tx_pdm_slot_mode(i2s_dev_t *hw, bool is_mono, bool is_copy, i2s_pdm_slot_mask_t mask)
{
@@ -1139,6 +1164,28 @@ static inline void i2s_ll_tx_pdm_line_mode(i2s_dev_t *hw, i2s_pdm_tx_line_mode_t
hw->tx_pcm2pdm_conf.tx_pdm_dac_2out_en = line_mode != I2S_PDM_TX_ONE_LINE_DAC;
}
/**
* @brief Set the TX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that send
*/
static inline void i2s_ll_tx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_tx_send_word_num = thresh;
}
/**
* @brief Set the RX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that received
*/
static inline void i2s_ll_rx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_rx_receive_word_num = thresh;
}
#ifdef __cplusplus
}
#endif
components/hal/esp32p4/include/hal/etm_ll.h
+2
View File
@@ -18,6 +18,8 @@
extern "C" {
#endif
#define ETM_LL_SUPPORT_STATUS 1 // Support to get and clear the status of the ETM event and task
/**
* @brief Enable the bus clock for ETM module
*
components/hal/esp32p4/include/hal/i2s_ll.h
+198 -11
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -17,7 +17,9 @@
#include "hal/assert.h"
#include "soc/i2s_periph.h"
#include "soc/i2s_struct.h"
#include "soc/soc_etm_struct.h"
#include "soc/hp_sys_clkrst_struct.h"
#include "soc/soc_etm_source.h"
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
@@ -38,6 +40,77 @@ extern "C" {
#define I2S_LL_XTAL_CLK_FREQ (40 * 1000000) // XTAL_CLK: 40MHz
#define I2S_LL_DEFAULT_CLK_FREQ I2S_LL_XTAL_CLK_FREQ // No PLL clock source on P4, use XTAL as default
#define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_EVENT_MAX]){ \
[0] = { \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S0_EVT_RX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_RECEIVED, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S0_EVT_TX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_SENT, \
}, \
}, \
[1] = { \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S1_EVT_RX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S1_EVT_X_WORDS_RECEIVED, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S1_EVT_TX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S1_EVT_X_WORDS_SENT, \
}, \
}, \
[2] = { \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S2_EVT_RX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S2_EVT_X_WORDS_RECEIVED, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_EVENT_DONE] = I2S2_EVT_TX_DONE, \
[I2S_ETM_EVENT_REACH_THRESH] = I2S2_EVT_X_WORDS_SENT, \
}, \
}, \
}[i2s_port][(chan_dir) - 1][event]
#define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \
(uint32_t[SOC_I2S_NUM][2][I2S_ETM_TASK_MAX]){ \
[0] = { \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_TASK_START] = I2S0_TASK_START_RX, \
[I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_RX, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_TASK_START] = I2S0_TASK_START_TX, \
[I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_TX, \
}, \
}, \
[1] = { \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_TASK_START] = I2S1_TASK_START_RX, \
[I2S_ETM_TASK_STOP] = I2S1_TASK_STOP_RX, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_TASK_START] = I2S1_TASK_START_TX, \
[I2S_ETM_TASK_STOP] = I2S1_TASK_STOP_TX, \
}, \
}, \
[2] = { \
[I2S_DIR_RX - 1] = { \
[I2S_ETM_TASK_START] = I2S2_TASK_START_RX, \
[I2S_ETM_TASK_STOP] = I2S2_TASK_STOP_RX, \
}, \
[I2S_DIR_TX - 1] = { \
[I2S_ETM_TASK_START] = I2S2_TASK_START_TX, \
[I2S_ETM_TASK_STOP] = I2S2_TASK_STOP_TX, \
}, \
}, \
}[i2s_port][(chan_dir) - 1][task]
#define I2S_LL_ETM_MAX_THRESH_NUM (0x3FFFUL)
/**
* @brief Enable the bus clock for I2S module
*
@@ -638,7 +711,7 @@ static inline void i2s_ll_rx_set_eof_num(i2s_dev_t *hw, int eof_num)
}
/**
* @brief Congfigure TX chan bit and audio data bit
* @brief Configure TX chan bit and audio data bit
*
* @param hw Peripheral I2S hardware instance address.
* @param chan_bit The chan bit width
@@ -651,7 +724,7 @@ static inline void i2s_ll_tx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int
}
/**
* @brief Congfigure RX chan bit and audio data bit
* @brief Configure RX chan bit and audio data bit
*
* @param hw Peripheral I2S hardware instance address.
* @param chan_bit The chan bit width
@@ -1052,11 +1125,11 @@ static inline void i2s_ll_tx_set_pdm_fpfs(i2s_dev_t *hw, uint32_t fp, uint32_t f
}
/**
* @brief Get I2S TX PDM fp configuration paramater
* @brief Get I2S TX PDM fp configuration parameter
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - fp configuration paramater
* - fp configuration parameter
*/
static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
{
@@ -1064,11 +1137,11 @@ static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
}
/**
* @brief Get I2S TX PDM fs configuration paramater
* @brief Get I2S TX PDM fs configuration parameter
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - fs configuration paramater
* - fs configuration parameter
*/
static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
{
@@ -1091,7 +1164,7 @@ static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw)
* @brief Configure RX PDM downsample
*
* @param hw Peripheral I2S hardware instance address.
* @param dsr PDM downsample configuration paramater
* @param dsr PDM downsample configuration parameter
*/
static inline void i2s_ll_rx_set_pdm_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t dsr)
{
@@ -1164,7 +1237,7 @@ static inline void i2s_ll_rx_enable_pdm_hp_filter(i2s_dev_t *hw, bool enable)
* @brief Configura TX a/u-law decompress or compress
*
* @param hw Peripheral I2S hardware instance address.
* @param pcm_cfg PCM configuration paramater
* @param pcm_cfg PCM configuration parameter
*/
static inline void i2s_ll_tx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
{
@@ -1176,7 +1249,7 @@ static inline void i2s_ll_tx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_
* @brief Configure RX a/u-law decompress or compress
*
* @param hw Peripheral I2S hardware instance address.
* @param pcm_cfg PCM configuration paramater
* @param pcm_cfg PCM configuration parameter
*/
static inline void i2s_ll_rx_set_pcm_type(i2s_dev_t *hw, i2s_pcm_compress_t pcm_cfg)
{
@@ -1348,7 +1421,7 @@ static inline void i2s_ll_tx_pdm_dma_take_mode(i2s_dev_t *hw, bool is_mono, bool
* @param is_mono The DMA data only has one slot (mono) or contains two slots (stereo)
* @param is_copy Whether the un-selected slot copies the data from the selected one
* If not, the un-selected slot will transmit the data from 'conf_single_data'
* @param mask The slot mask to selet the slot
* @param mask The slot mask to select the slot
*/
static inline void i2s_ll_tx_pdm_slot_mode(i2s_dev_t *hw, bool is_mono, bool is_copy, i2s_pdm_slot_mask_t mask)
{
@@ -1431,6 +1504,120 @@ static inline uint32_t i2s_ll_tx_get_bclk_sync_count(i2s_dev_t *hw)
return hw->bck_cnt.tx_bck_cnt;
}
/**
* @brief Set the TX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that send
*/
static inline void i2s_ll_tx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_tx_send_word_num = thresh;
}
/**
* @brief Set the RX ETM threshold of REACH_THRESH event
*
* @param hw Peripheral I2S hardware instance address.
* @param thresh The threshold that received
*/
static inline void i2s_ll_rx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
{
hw->etm_conf.etm_rx_receive_word_num = thresh;
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_tx_done_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st4.i2s0_evt_tx_done_st;
case 1:
return SOC_ETM.evt_st4.i2s1_evt_tx_done_st;
case 2:
return SOC_ETM.evt_st4.i2s2_evt_tx_done_st;
default:
HAL_ASSERT(false);
}
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_rx_done_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st4.i2s0_evt_rx_done_st;
case 1:
return SOC_ETM.evt_st4.i2s1_evt_rx_done_st;
case 2:
return SOC_ETM.evt_st4.i2s2_evt_rx_done_st;
default:
HAL_ASSERT(false);
}
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_tx_threshold_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st4.i2s0_evt_x_words_sent_st;
case 1:
return SOC_ETM.evt_st4.i2s1_evt_x_words_sent_st;
case 2:
return SOC_ETM.evt_st4.i2s2_evt_x_words_sent_st;
default:
HAL_ASSERT(false);
}
}
/**
* @brief Get I2S ETM TX done event status
*
* @param hw Peripheral I2S hardware instance address.
* @return
* - true TX done event triggered
* - false TX done event not triggered
*/
static inline bool i2s_ll_get_etm_rx_threshold_event_status(i2s_dev_t *hw)
{
uint32_t i2s_id = I2S_LL_GET_ID(hw);
switch (i2s_id) {
case 0:
return SOC_ETM.evt_st4.i2s0_evt_x_words_received_st;
case 1:
return SOC_ETM.evt_st4.i2s1_evt_x_words_received_st;
case 2:
return SOC_ETM.evt_st4.i2s2_evt_x_words_received_st;
default:
HAL_ASSERT(false);
}
}
#ifdef __cplusplus
}
#endif
components/hal/include/hal/i2s_types.h
+31 -3
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -98,7 +98,7 @@ typedef enum {
#if SOC_I2S_SUPPORTS_PDM_TX
/**
* @brief pdm tx singnal scaling mode
* @brief pdm tx signal scaling mode
*/
typedef enum {
I2S_PDM_SIG_SCALING_DIV_2 = 0, /*!< I2S TX PDM signal scaling: /2 */
@@ -124,7 +124,7 @@ typedef enum {
/**
* @brief I2S slot select in standard mode
* @note It has different meanings in tx/rx/mono/stereo mode, and it may have differen behaviors on different targets
* @note It has different meanings in tx/rx/mono/stereo mode, and it may have different behaviors on different targets
* For the details, please refer to the I2S API reference
*/
typedef enum {
@@ -184,6 +184,34 @@ typedef enum {
} i2s_tdm_slot_mask_t;
#endif // SOC_I2S_SUPPORTS_TDM
/**
* @brief I2S channel events that supported by the ETM module
*/
typedef enum {
/** Trigger condition:
* TX: no data to send in the TX FIFO, i.e., DMA need to stop (next desc is NULL)
* RX: 1. If rx_stop_mode = 0, this event will trigger when DMA is stopped (next desc is NULL)
* 2. If rx_stop_mode = 1, this event will trigger when DMA in_suc_eof.
* 3. If rx_stop_mode = 2, this event will trigger when RX FIFO is full.
*/
I2S_ETM_EVENT_DONE, /*!< Event that I2S TX or RX stopped */
/** Trigger condition:
* TX: the sent words(in 32-bit) number reach the threshold that configured in `etm_tx_send_word_num`
* RX: the received words(in 32-bit) number reach the threshold that configured in `etm_rx_receive_word_num`
* and `etm_rx_receive_word_num` should be smaller than the size of the DMA buffer in one `in_suc_eof` event.
*/
I2S_ETM_EVENT_REACH_THRESH, /*!< Event that the I2S sent or received data reached the threshold */
I2S_ETM_EVENT_MAX, /*!< Maximum number of events */
} i2s_etm_event_type_t;
/**
* @brief I2S channel tasks that supported by the ETM module
*/
typedef enum {
I2S_ETM_TASK_START, /*!< Start the I2S channel */
I2S_ETM_TASK_STOP, /*!< Stop the I2S channel */
I2S_ETM_TASK_MAX, /*!< Maximum number of tasks */
} i2s_etm_task_type_t;
#ifdef __cplusplus
}