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synced 2026-10-02 11:10:54 +03:00
feat(esp32c6): auto adjust LDO voltage using pvt function
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@@ -187,6 +187,10 @@ config SOC_PMU_SUPPORTED
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bool
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default y
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config SOC_PMU_PVT_SUPPORTED
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bool
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default y
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config SOC_PAU_SUPPORTED
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bool
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default y
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File diff suppressed because it is too large
Load Diff
@@ -69,6 +69,7 @@
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#define SOC_BOD_SUPPORTED 1
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#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
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#define SOC_PMU_SUPPORTED 1
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#define SOC_PMU_PVT_SUPPORTED 1
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#define SOC_PAU_SUPPORTED 1
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#define SOC_LP_TIMER_SUPPORTED 1
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#define SOC_LP_AON_SUPPORTED 1
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@@ -77,6 +77,16 @@ extern const regdma_entries_config_t flash_spimem_regs_retention[SPIMEM_RETENTIO
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#define SYSTIMER_RETENTION_LINK_LEN 19
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extern const regdma_entries_config_t systimer_regs_retention[SYSTIMER_RETENTION_LINK_LEN];
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/**
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* @brief Provide access to pvt configuration registers retention
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* context definition.
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*
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* This is an internal function of the sleep retention driver, and is not
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* useful for external use.
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*/
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#define PVT_RETENTION_LINK_LEN 1
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extern const regdma_entries_config_t pvt_regs_retention[PVT_RETENTION_LINK_LEN];
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#ifdef __cplusplus
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}
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#endif
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@@ -16,6 +16,7 @@
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#include "soc/gpio_reg.h"
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#include "soc/io_mux_reg.h"
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#include "soc/interrupt_matrix_reg.h"
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#include "soc/pvt_reg.h"
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/* Interrupt Matrix Registers Context */
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#define N_REGS_INTR_MATRIX() (((INTMTX_CORE0_CLOCK_GATE_REG - DR_REG_INTMTX_BASE) / 4) + 1)
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@@ -112,3 +113,10 @@ const regdma_entries_config_t systimer_regs_retention[] = {
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[18] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_SYSTIMER_LINK(0x12), SYSTIMER_INT_ENA_REG, SYSTIMER_INT_ENA_REG, 1, 0, 0), .owner = ENTRY(0) | ENTRY(2) } /* Systimer intr enable */
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};
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_Static_assert(ARRAY_SIZE(systimer_regs_retention) == SYSTIMER_RETENTION_LINK_LEN, "Inconsistent Systimer retention link length definitions");
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/* PVT Registers Context */
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#define N_REGS_PVT (((PVT_COMB_PD_SITE2_UNIT2_VT2_CONF2_REG - DR_REG_PVT_MONITOR_BASE) / 4) + 1)
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const regdma_entries_config_t pvt_regs_retention[] = {
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[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PVT_LINK(0x00), DR_REG_PVT_MONITOR_BASE, DR_REG_PVT_MONITOR_BASE, N_REGS_PVT, 0, 0), .owner = ENTRY(0) | ENTRY(2) },
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};
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_Static_assert(ARRAY_SIZE(pvt_regs_retention) == PVT_RETENTION_LINK_LEN, "Inconsistent PVT retention link length definitions");
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