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change(soc): rename peripheral powerdowned sleep wakeable IO soc_caps

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rename SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK to SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_MASK
rename SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT to SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_PIN_CNT
rename SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP to SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP
This commit is contained in:
wuzhenghui
2026-02-01 12:16:20 +08:00
committed by Jack
parent afa266ebd6
commit 85601ccb69
29 changed files with 98 additions and 92 deletions
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components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
+3 -3
View File
@@ -339,15 +339,15 @@ config SOC_LP_IO_CLOCK_IS_INDEPENDENT
bool
default y
config SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
config SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP
bool
default y
config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK
config SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_MASK
int
default 0
config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT
config SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_PIN_CNT
int
default 6
components/soc/esp32h4/include/soc/soc_caps.h
+4 -3
View File
@@ -220,9 +220,10 @@
// LP IO peripherals have independent clock gating to manage
#define SOC_LP_IO_CLOCK_IS_INDEPENDENT (1)
#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP 1
#define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5)
#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (6)
#define SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP (1)
#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP
#define SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5)
#define SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_PIN_CNT (6)
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_39)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK (SOC_GPIO_VALID_GPIO_MASK & ~((1ULL<<6) - 1))