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change(soc): rename peripheral powerdowned sleep wakeable IO soc_caps
rename SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK to SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_MASK rename SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT to SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_PIN_CNT rename SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP to SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP
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@@ -224,7 +224,7 @@
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// LP IO peripherals have independent clock gating to manage
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#define SOC_LP_IO_CLOCK_IS_INDEPENDENT (1)
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// GPIO7~14 on ESP32H2 can support chip deep sleep wakeup through EXT1 wake up
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// GPIO7~14 on ESP32H2 can support chip HP peripheral powerdown-ed sleep wakeup through EXT1 wake up
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#define SOC_GPIO_VALID_GPIO_MASK ((1U << SOC_GPIO_PIN_COUNT) - 1)
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#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK SOC_GPIO_VALID_GPIO_MASK
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