Merge branch 'chip/support_wifi_low_power_for_s31_rebase_master' into 'master'

Chip/support wifi low power for s31 rebase master

Closes IDF-14579 and IDF-14582

See merge request espressif/esp-idf!48532

components/soc/esp32s31/include/soc/Kconfig.soc_caps.in

@@ -1519,6 +1519,18 @@ config SOC_PM_MODEM_RETENTION_BY_REGDMA
     bool
     default y
 
+config SOC_PM_SUPPORT_PMU_MODEM_STATE
+    bool
+    default y
+
+config SOC_PM_MODEM_STATE_USE_XTAL
+    bool
+    default y
+
+config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED
+    bool
+    default y
+
 config SOC_PM_RETENTION_MODULE_NUM
     int
     default 64

components/soc/esp32s31/include/soc/soc_caps.h

@@ -565,7 +565,23 @@
 #define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1)
 
 #define SOC_PM_MODEM_RETENTION_BY_REGDMA           (1)
-// #define SOC_PM_SUPPORT_PMU_MODEM_STATE      (1) // TODO: [ESP32S31] IDF-14582
+#define SOC_PM_SUPPORT_PMU_MODEM_STATE             (1)
+#define MAC_SUPPORT_PMU_MODEM_STATE                SOC_PM_SUPPORT_PMU_MODEM_STATE
+/* Since SOC APB and MODEM APB on ESP32-S31 are decoupled, XTAL can be used as SOC clock in modem state */
+#define SOC_PM_MODEM_STATE_USE_XTAL                (1)
+
+/*
+ * min_slp_val is derived from slow clock period (450us / slow_clk).
+ * With internal slow clock, frequency drift may cause min_slp_val to vary.
+ * If the updated value becomes larger than the previous one, modem wakeup
+ * path may still use the old value, leading to inconsistent PMU timing and
+ * potential modem state hang.
+ *
+ * Therefore, when using internal slow clock, min_slp_val is fixed after init,
+ * and clock drift is handled via separate timing compensation instead of
+ * updating this PMU threshold dynamically.
+ */
+#define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED    (1)
 
 #define SOC_PM_RETENTION_MODULE_NUM         (64)
 

components/soc/esp32s31/include/soc/system_periph_retention.h

@@ -45,6 +45,20 @@ extern const regdma_entries_config_t cache_regs_retention[CACHE_RETENTION_LINK_L
 #define TEE_APM_RETENTION_LINK_LEN   14
 extern const regdma_entries_config_t tee_apm_regs_retention[TEE_APM_RETENTION_LINK_LEN];
 
+#if !SOC_APM_SUPPORTED
+/**
+ * @brief Provide access to the APM control filter disable retention context.
+ *
+ * Workaround (IDF-14620): until full TEE/APM retention is supported, this only disables all APM
+ * control filters at the retention backup/restore stages.
+ *
+ * This is an internal function of the sleep retention driver, and is not
+ * useful for external use.
+ */
+#define TEE_APM_FILTER_DISABLE_RETENTION_LINK_LEN   3
+extern const regdma_entries_config_t tee_apm_filter_disable_regs_retention[TEE_APM_FILTER_DISABLE_RETENTION_LINK_LEN];
+#endif // !SOC_APM_SUPPORTED
+
 /**
  * @brief Provide access to hp_system configuration registers retention
  * context definition.