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feat(hal):graudate the sdmmc/sdio_slave hal driver into a new component

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This commit is contained in:
armando
2026-02-02 09:47:54 +08:00
parent 46ae4843aa
commit 8499ad6ab0
44 changed files with 178 additions and 186 deletions
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components/soc/esp32/include/soc/sdio_slave_pins.h
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/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
#pragma once
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CLK 6
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CMD 11
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D0 7
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D1 8
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D2 9
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D3 10
#define SDIO_SLAVE_SLOT0_FUNC 0
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK 14
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD 15
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0 2
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1 4
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2 12
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3 13
#define SDIO_SLAVE_SLOT1_FUNC 4
components/soc/esp32/include/soc/sdmmc_pins.h
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// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SOC_SDMMC_PINS_H_
#define _SOC_SDMMC_PINS_H_
#define SDMMC_SLOT0_IOMUX_PIN_NUM_CLK 6
#define SDMMC_SLOT0_IOMUX_PIN_NUM_CMD 11
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D0 7
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D1 8
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D2 9
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D3 10
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D4 16
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D5 17
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D6 5
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D7 18
#define SDMMC_SLOT0_FUNC 0
#define SDMMC_SLOT1_IOMUX_PIN_NUM_CLK 14
#define SDMMC_SLOT1_IOMUX_PIN_NUM_CMD 15
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D0 2
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D1 4
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D2 12
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D3 13
#define SDMMC_SLOT1_FUNC 4
#endif /* _SOC_SDMMC_PINS_H_ */
components/soc/esp32/sdio_slave_periph.c
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/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
#include <stdint.h>
#include "soc/sdio_slave_periph.h"
#include "soc/sdio_slave_pins.h"
/**
* I/O slot of sdio slave:
* Slot 0: GPIO 6, 11, 7, 8, 9, 10.
* Slot 1: GPIO 14, 15, 2, 4, 12, 13 for CLK, CMD, D0, D1, D2, D3 respectively.
*
* @note 1: Only one peripheral for SDIO and only one slot can work at the same time.
* @note 2: Slot 0 is occupied by SPI for Flash, therefore we only use Slot 1
*/
const sdio_slave_slot_info_t sdio_slave_slot_info[1] = {
{
.clk_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK,
.cmd_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD,
.d0_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0,
.d1_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1,
.d2_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2,
.d3_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3,
.func = SDIO_SLAVE_SLOT1_FUNC,
},
};
components/soc/esp32/sdmmc_periph.c
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/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
#include "soc/sdmmc_periph.h"
#include "soc/sdmmc_pins.h"
const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS] = {
{
.width = 8,
.card_detect = HOST_CARD_DETECT_N_1_IDX,
.write_protect = HOST_CARD_WRITE_PRT_1_IDX,
.card_int = HOST_CARD_INT_N_1_IDX,
},
{
.width = 4,
.card_detect = HOST_CARD_DETECT_N_2_IDX,
.write_protect = HOST_CARD_WRITE_PRT_2_IDX,
.card_int = HOST_CARD_INT_N_2_IDX,
}
};
const sdmmc_slot_io_info_t sdmmc_slot_gpio_num[SOC_SDMMC_NUM_SLOTS] = {
{
.clk = SDMMC_SLOT0_IOMUX_PIN_NUM_CLK,
.cmd = SDMMC_SLOT0_IOMUX_PIN_NUM_CMD,
.d0 = SDMMC_SLOT0_IOMUX_PIN_NUM_D0,
.d1 = SDMMC_SLOT0_IOMUX_PIN_NUM_D1,
.d2 = SDMMC_SLOT0_IOMUX_PIN_NUM_D2,
.d3 = SDMMC_SLOT0_IOMUX_PIN_NUM_D3,
.d4 = SDMMC_SLOT0_IOMUX_PIN_NUM_D4,
.d5 = SDMMC_SLOT0_IOMUX_PIN_NUM_D5,
.d6 = SDMMC_SLOT0_IOMUX_PIN_NUM_D6,
.d7 = SDMMC_SLOT0_IOMUX_PIN_NUM_D7,
},
{
.clk = SDMMC_SLOT1_IOMUX_PIN_NUM_CLK,
.cmd = SDMMC_SLOT1_IOMUX_PIN_NUM_CMD,
.d0 = SDMMC_SLOT1_IOMUX_PIN_NUM_D0,
.d1 = SDMMC_SLOT1_IOMUX_PIN_NUM_D1,
.d2 = SDMMC_SLOT1_IOMUX_PIN_NUM_D2,
.d3 = SDMMC_SLOT1_IOMUX_PIN_NUM_D3,
.d4 = -1, //slot1 has no D4-7
.d5 = -1,
.d6 = -1,
.d7 = -1,
}
};
const sdmmc_slot_io_info_t sdmmc_slot_gpio_sig[SOC_SDMMC_NUM_SLOTS] = {
{
.clk = -1,
.cmd = -1,
.d0 = -1,
.d1 = -1,
.d2 = -1,
.d3 = -1,
.d4 = -1,
.d5 = -1,
.d6 = -1,
.d7 = -1,
},
{
.clk = -1,
.cmd = -1,
.d0 = -1,
.d1 = -1,
.d2 = -1,
.d3 = -1,
.d4 = -1,
.d5 = -1,
.d6 = -1,
.d7 = -1,
}
};