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Merge branch 'contrib/github_pr_18664_v6.0' into 'release/v6.0'

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ulp_riscv: prioritize error bits over data flags in I2C interrupt wait (GitHub PR) (v6.0)

See merge request espressif/esp-idf!49717
This commit is contained in:
Marius Vikhammer
2026-06-29 14:42:18 +08:00
parent 98effc1d13 5c2be9ecc4
commit 837628688e
2 changed files with 26 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/ulp/ulp_riscv/ulp_core/ulp_riscv_i2c.c
+12 -10
View File
@@ -75,19 +75,21 @@ static inline int32_t ulp_riscv_i2c_wait_for_interrupt(int32_t ticks_to_wait)
while (1) { while (1) {
status = READ_PERI_REG(RTC_I2C_INT_ST_REG); status = READ_PERI_REG(RTC_I2C_INT_ST_REG);
/* Return 0 if Tx or Rx data interrupt bits are set. */ /* If a NAK, Timeout, or Arbitration Loss occurs, abort immediately. */
#if CONFIG_IDF_TARGET_ESP32S2
if ((status & RTC_I2C_TIMEOUT_INT_ST) ||
#elif CONFIG_IDF_TARGET_ESP32S3
if ((status & RTC_I2C_TIME_OUT_INT_ST) ||
#endif // CONFIG_IDF_TARGET_ESP32S2
(status & RTC_I2C_ACK_ERR_INT_ST) ||
(status & RTC_I2C_ARBITRATION_LOST_INT_ST)) {
return -1;
}
/* Return 0 ONLY if hardware channels are error-free and data bits are latched. */
if ((status & RTC_I2C_TX_DATA_INT_ST) || if ((status & RTC_I2C_TX_DATA_INT_ST) ||
(status & RTC_I2C_RX_DATA_INT_ST)) { (status & RTC_I2C_RX_DATA_INT_ST)) {
return 0; return 0;
/* In case of error status, break and return -1 */
#if CONFIG_IDF_TARGET_ESP32S2
} else if ((status & RTC_I2C_TIMEOUT_INT_ST) ||
#elif CONFIG_IDF_TARGET_ESP32S3
} else if ((status & RTC_I2C_TIME_OUT_INT_ST) ||
#endif // CONFIG_IDF_TARGET_ESP32S2
(status & RTC_I2C_ACK_ERR_INT_ST) ||
(status & RTC_I2C_ARBITRATION_LOST_INT_ST)) {
return -1;
} }
if (ticks_to_wait > -1) { if (ticks_to_wait > -1) {
components/ulp/ulp_riscv/ulp_riscv_i2c.c
+14 -12
View File
@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -254,21 +254,23 @@ static inline esp_err_t ulp_riscv_i2c_wait_for_interrupt(int32_t ticks_to_wait)
while (1) { while (1) {
status = READ_PERI_REG(RTC_I2C_INT_ST_REG); status = READ_PERI_REG(RTC_I2C_INT_ST_REG);
/* Return ESP_OK if Tx or Rx data interrupt bits are set. */ /* If a NAK, Timeout, or Arbitration Loss occurs, abort immediately. */
#if CONFIG_IDF_TARGET_ESP32S2
if ((status & RTC_I2C_TIMEOUT_INT_ST) ||
#elif CONFIG_IDF_TARGET_ESP32S3
if ((status & RTC_I2C_TIME_OUT_INT_ST) ||
#endif // CONFIG_IDF_TARGET_ESP32S2
(status & RTC_I2C_ACK_ERR_INT_ST) ||
(status & RTC_I2C_ARBITRATION_LOST_INT_ST)) {
ret = ESP_FAIL;
break;
}
/* Return ESP_OK only if hardware channels are error-free and data bits are latched. */
if ((status & RTC_I2C_TX_DATA_INT_ST) || if ((status & RTC_I2C_TX_DATA_INT_ST) ||
(status & RTC_I2C_RX_DATA_INT_ST)) { (status & RTC_I2C_RX_DATA_INT_ST)) {
ret = ESP_OK; ret = ESP_OK;
break; break;
/* In case of error status, break and return ESP_FAIL */
#if CONFIG_IDF_TARGET_ESP32S2
} else if ((status & RTC_I2C_TIMEOUT_INT_ST) ||
#elif CONFIG_IDF_TARGET_ESP32S3
} else if ((status & RTC_I2C_TIME_OUT_INT_ST) ||
#endif // CONFIG_IDF_TARGET_ESP32S2
(status & RTC_I2C_ACK_ERR_INT_ST) ||
(status & RTC_I2C_ARBITRATION_LOST_INT_ST)) {
ret = ESP_FAIL;
break;
} }
if (ticks_to_wait > -1) { if (ticks_to_wait > -1) {