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https://github.com/espressif/esp-idf.git
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Merge branch 'feature/ledc_etm_support_v6.0' into 'release/v6.0'
feat(ledc): add ETM support for LEDC peripheral (v6.0) See merge request espressif/esp-idf!43401
This commit is contained in:
morris
@@ -16,6 +16,7 @@
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#include "soc/clk_tree_defs.h"
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#include "soc/pcr_struct.h"
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#include "soc/soc_caps.h"
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#include "soc/soc_etm_source.h"
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#ifdef __cplusplus
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extern "C" {
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@@ -23,14 +24,105 @@ extern "C" {
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#define LEDC_LL_GET_HW() &LEDC
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#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
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#define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_FADE_PARAM_DUTY_NUM_V)
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#define LEDC_LL_DUTY_CYCLE_MAX (LEDC_CH0_FADE_PARAM_DUTY_CYCLE_V)
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#define LEDC_LL_DUTY_SCALE_MAX (LEDC_CH0_FADE_PARAM_SCALE_V)
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#define LEDC_LL_HPOINT_VAL_MAX (LEDC_HPOINT_CH0_V)
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#define LEDC_LL_OVF_CNT_MAX (LEDC_OVF_NUM_CH0_V + 1)
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#define LEDC_LL_FRACTIONAL_BITS (8)
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#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
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#define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS
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// Channel tasks: ID, enable register and bit
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#define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \
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((uint32_t [1][LEDC_CHANNEL_ETM_TASK_MAX]){{ \
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[LEDC_CHANNEL_ETM_TASK_FADE_SCALE_UPDATE] = LEDC_TASK_DUTY_SCALE_UPDATE_CH0, \
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[LEDC_CHANNEL_ETM_TASK_SIG_OUT_DIS] = LEDC_TASK_SIG_OUT_DIS_CH0, \
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[LEDC_CHANNEL_ETM_TASK_OVF_CNT_RST] = LEDC_TASK_OVF_CNT_RST_CH0, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESTART] = LEDC_TASK_FADE_RESTART_CH0, \
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[LEDC_CHANNEL_ETM_TASK_FADE_PAUSE] = LEDC_TASK_FADE_PAUSE_CH0, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESUME] = LEDC_TASK_FADE_RESUME_CH0, \
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}}[(group)][(task)] + (channel))
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#define LEDC_LL_ETM_CHANNEL_TASK_EN_REG(group, task) \
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((volatile uint32_t *[1][LEDC_CHANNEL_ETM_TASK_MAX]){{ \
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[LEDC_CHANNEL_ETM_TASK_FADE_SCALE_UPDATE] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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[LEDC_CHANNEL_ETM_TASK_SIG_OUT_DIS] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_CHANNEL_ETM_TASK_OVF_CNT_RST] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESTART] = (volatile uint32_t *)LEDC_EVT_TASK_EN2_REG, \
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[LEDC_CHANNEL_ETM_TASK_FADE_PAUSE] = (volatile uint32_t *)LEDC_EVT_TASK_EN2_REG, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESUME] = (volatile uint32_t *)LEDC_EVT_TASK_EN2_REG, \
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}}[(group)][(task)])
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#define LEDC_LL_ETM_CHANNEL_TASK_EN_BIT(group, channel, task) \
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((uint32_t [1][LEDC_CHANNEL_ETM_TASK_MAX]){{ \
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[LEDC_CHANNEL_ETM_TASK_FADE_SCALE_UPDATE] = BIT(LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_SIG_OUT_DIS] = BIT(LEDC_TASK_SIG_OUT_DIS_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_OVF_CNT_RST] = BIT(LEDC_TASK_OVF_CNT_RST_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESTART] = BIT(LEDC_TASK_FADE_RESTART_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_FADE_PAUSE] = BIT(LEDC_TASK_FADE_PAUSE_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESUME] = BIT(LEDC_TASK_FADE_RESUME_CH0_EN_S), \
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}}[(group)][(task)] << (channel))
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// Channel events: ID, enable register and bit
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#define LEDC_LL_ETM_CHANNEL_EVENT_ID(group, channel, event) \
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((uint32_t [1][LEDC_CHANNEL_ETM_EVENT_MAX]){{ \
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[LEDC_CHANNEL_ETM_EVENT_FADE_END] = LEDC_EVT_DUTY_CHNG_END_CH0, \
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[LEDC_CHANNEL_ETM_EVENT_REACH_MAX_OVF_CNT] = LEDC_EVT_OVF_CNT_PLS_CH0, \
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}}[(group)][(event)] + (channel))
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#define LEDC_LL_ETM_CHANNEL_EVENT_EN_REG(group, event) \
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((volatile uint32_t *[1][LEDC_CHANNEL_ETM_EVENT_MAX]){{ \
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[LEDC_CHANNEL_ETM_EVENT_FADE_END] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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[LEDC_CHANNEL_ETM_EVENT_REACH_MAX_OVF_CNT] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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}}[(group)][(event)])
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#define LEDC_LL_ETM_CHANNEL_EVENT_EN_BIT(group, channel, event) \
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((uint32_t [1][LEDC_CHANNEL_ETM_EVENT_MAX]){{ \
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[LEDC_CHANNEL_ETM_EVENT_FADE_END] = BIT(LEDC_EVT_DUTY_CHNG_END_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_EVENT_REACH_MAX_OVF_CNT] = BIT(LEDC_EVT_OVF_CNT_PLS_CH0_EN_S), \
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}}[(group)][(event)] << (channel))
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// Timer tasks: ID, enable register and bit
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#define LEDC_LL_ETM_TIMER_TASK_ID(group, timer, task) \
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((uint32_t [1][LEDC_TIMER_ETM_TASK_MAX]){{ \
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[LEDC_TIMER_ETM_TASK_RST] = LEDC_TASK_TIMER0_RST, \
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[LEDC_TIMER_ETM_TASK_RESUME] = LEDC_TASK_TIMER0_RESUME, \
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[LEDC_TIMER_ETM_TASK_PAUSE] = LEDC_TASK_TIMER0_PAUSE, \
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}}[(group)][(task)] + (timer))
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#define LEDC_LL_ETM_TIMER_TASK_EN_REG(group, task) \
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((volatile uint32_t *[1][LEDC_TIMER_ETM_TASK_MAX]){{ \
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[LEDC_TIMER_ETM_TASK_RST] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_TIMER_ETM_TASK_RESUME] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_TIMER_ETM_TASK_PAUSE] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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}}[(group)][(task)])
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#define LEDC_LL_ETM_TIMER_TASK_EN_BIT(group, timer, task) \
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((uint32_t [1][LEDC_TIMER_ETM_TASK_MAX]){{ \
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[LEDC_TIMER_ETM_TASK_RST] = BIT(LEDC_TASK_TIMER0_RST_EN_S), \
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[LEDC_TIMER_ETM_TASK_RESUME] = BIT(LEDC_TASK_TIMER0_PAUSE_RESUME_EN_S), \
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[LEDC_TIMER_ETM_TASK_PAUSE] = BIT(LEDC_TASK_TIMER0_PAUSE_RESUME_EN_S), \
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}}[(group)][(task)] << (timer))
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// Timer events: ID, enable register and bit
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#define LEDC_LL_ETM_TIMER_EVENT_ID(group, timer, event) \
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((uint32_t [1][LEDC_TIMER_ETM_EVENT_MAX]){{ \
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[LEDC_TIMER_ETM_EVENT_OVF] = LEDC_EVT_TIME_OVF_TIMER0, \
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}}[(group)][(event)] + (timer))
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#define LEDC_LL_ETM_TIMER_EVENT_EN_REG(group, event) \
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((volatile uint32_t *[1][LEDC_TIMER_ETM_EVENT_MAX]){{ \
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[LEDC_TIMER_ETM_EVENT_OVF] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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}}[(group)][(event)])
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#define LEDC_LL_ETM_TIMER_EVENT_EN_BIT(group, timer, event) \
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((uint32_t [1][LEDC_TIMER_ETM_EVENT_MAX]){{ \
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[LEDC_TIMER_ETM_EVENT_OVF] = BIT(LEDC_EVT_TIME_OVF_TIMER0_EN_S), \
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}}[(group)][(event)] << (timer))
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/**
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* @brief Enable peripheral register clock
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*
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@@ -534,6 +626,71 @@ static inline void ledc_ll_get_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_m
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*timer_sel = (ledc_timer_t)(hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel);
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}
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/**
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* @brief Enable or disable ETM event/task
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param reg_addr Register address to control the ETM event/task
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* @param bit Bit position in the register
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* @param enable Enable or disable the ETM event/task
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*
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* @return None
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*/
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static inline void ledc_ll_etm_enable_evt_task(ledc_dev_t *hw, ledc_mode_t speed_mode, volatile uint32_t *reg_addr, uint32_t bit, bool enable)
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{
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if (enable) {
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REG_SET_BIT(reg_addr, bit);
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} else {
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REG_CLR_BIT(reg_addr, bit);
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}
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}
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/**
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* @brief Enable or disable the timer overflow counter for the specified channel
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param channel LEDC channel index (0-5), select from ledc_channel_t
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* @param enable True to enable; false to disable
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*
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* @return None
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*/
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static inline void ledc_ll_channel_enable_timer_ovt_cnt(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel, bool enable)
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{
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hw->channel_group[speed_mode].channel[channel].conf0.ovf_cnt_en = enable;
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}
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/**
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* @brief Set the maximum timer overflow count for the specified channel
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param channel LEDC channel index (0-5), select from ledc_channel_t
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* @param max_ovf_cnt The maximum timer overflow count
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*
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* @return None
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*/
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static inline void ledc_ll_channel_set_maximum_timer_ovf_cnt(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t max_ovf_cnt)
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{
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HAL_ASSERT(max_ovf_cnt > 0 && max_ovf_cnt <= LEDC_LL_OVF_CNT_MAX);
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hw->channel_group[speed_mode].channel[channel].conf0.ovf_num = max_ovf_cnt - 1;
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}
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/**
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* @brief Reset the timer overflow counter for the specified channel
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param channel LEDC channel index (0-5), select from ledc_channel_t
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*
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* @return None
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*/
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static inline void ledc_ll_channel_reset_timer_ovf_cnt(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel)
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{
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hw->channel_group[speed_mode].channel[channel].conf0.ovf_cnt_reset = 1;
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}
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#ifdef __cplusplus
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}
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#endif
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