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Merge branch 'esp32h4_debug_asistant_v6.0' into 'release/v6.0'
feat(esp32h4): add assist_debug/bus_monitor support (v6.0) See merge request espressif/esp-idf!45949
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@@ -127,6 +127,10 @@ config SOC_CLK_TREE_SUPPORTED
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bool
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default y
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config SOC_ASSIST_DEBUG_SUPPORTED
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bool
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default y
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config SOC_WDT_SUPPORTED
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bool
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default y
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -13,6 +13,10 @@
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#define ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG BUS_MONITOR_CORE_0_DEBUG_MODE_REG
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#define ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE BUS_MONITOR_CORE_0_DEBUG_MODULE_ACTIVE
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#define ASSIST_DEBUG_CORE_0_MONTR_ENA_REG BUS_MONITOR_CORE_0_MONTR_ENA_REG
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#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA BUS_MONITOR_CORE_0_SP_SPILL_MIN_ENA
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#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA BUS_MONITOR_CORE_0_SP_SPILL_MAX_ENA
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#define ASSIST_DEBUG_CORE_0_SP_MIN_REG BUS_MONITOR_CORE_0_SP_MIN_REG
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#define ASSIST_DEBUG_CORE_0_SP_MAX_REG BUS_MONITOR_CORE_0_SP_MAX_REG
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@@ -20,12 +24,24 @@
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#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN BUS_MONITOR_CORE_0_RCD_PDEBUGEN
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#define ASSIST_DEBUG_CORE_0_RCD_RECORDEN BUS_MONITOR_CORE_0_RCD_RECORDEN
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#define ASSIST_DEBUG_CORE_0_INTR_ENA_REG BUS_MONITOR_CORE_0_INTR_ENA_REG
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#define ASSIST_DEBUG_CORE_1_DEBUG_MODE_REG BUS_MONITOR_CORE_1_DEBUG_MODE_REG
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#define ASSIST_DEBUG_CORE_1_DEBUG_MODULE_ACTIVE BUS_MONITOR_CORE_1_DEBUG_MODULE_ACTIVE
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#define ASSIST_DEBUG_CORE_1_MONTR_ENA_REG BUS_MONITOR_CORE_1_MONTR_ENA_REG
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#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_ENA BUS_MONITOR_CORE_1_SP_SPILL_MIN_ENA
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#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_ENA BUS_MONITOR_CORE_1_SP_SPILL_MAX_ENA
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#define ASSIST_DEBUG_CORE_1_SP_MIN_REG BUS_MONITOR_CORE_1_SP_MIN_REG
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#define ASSIST_DEBUG_CORE_1_SP_MAX_REG BUS_MONITOR_CORE_1_SP_MAX_REG
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#define ASSIST_DEBUG_CORE_1_RCD_EN_REG BUS_MONITOR_CORE_1_RCD_EN_REG
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#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGEN BUS_MONITOR_CORE_1_RCD_PDEBUGEN
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#define ASSIST_DEBUG_CORE_1_RCD_RECORDEN BUS_MONITOR_CORE_1_RCD_RECORDEN
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#define ASSIST_DEBUG_CORE_1_INTR_ENA_REG BUS_MONITOR_CORE_1_INTR_ENA_REG
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#define ASSIST_DEBUG_SP_SPILL_BITS (ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA | ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA)
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#define ASSIST_DEBUG_CORE_0_MONITOR_REG ASSIST_DEBUG_CORE_0_MONTR_ENA_REG
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#define ASSIST_DEBUG_CORE_1_MONITOR_REG ASSIST_DEBUG_CORE_1_MONTR_ENA_REG
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@@ -83,7 +83,7 @@
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// #define SOC_ULP_LP_UART_SUPPORTED 1 // TODO: [ESP32H4] IDF-12445 IDF-12451
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#define SOC_REG_I2C_SUPPORTED 1
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#define SOC_CLK_TREE_SUPPORTED 1
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// #define SOC_ASSIST_DEBUG_SUPPORTED 1 // TODO: [ESP32H4] IDF-12310
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#define SOC_ASSIST_DEBUG_SUPPORTED 1
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#define SOC_WDT_SUPPORTED 1
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#define SOC_SPI_FLASH_SUPPORTED 1 // TODO: [ESP32H4] IDF-12388
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#define SOC_SPIRAM_SUPPORTED 1
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@@ -15,3 +15,5 @@
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#define SYS_TG0_WDT_INTR_SOURCE ETS_TG0_WDT_INTR_SOURCE
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#define SYS_TG1_WDT_INTR_SOURCE ETS_TG1_WDT_INTR_SOURCE
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#define ETS_ASSIST_DEBUG_INTR_SOURCE ETS_BUS_MONITOR_INTR_SOURCE
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@@ -6,7 +6,7 @@
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PROVIDE ( TRACE0 = 0x60000000 );
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PROVIDE ( TRACE1 = 0x60001000 );
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PROVIDE ( ASSIST_DEBUG = 0x60002000 );
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PROVIDE ( BUS_MONITOR = 0x60002000 );
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PROVIDE ( INTPRI = 0x60005000 );
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PROVIDE ( CACHE = 0x60008000 );
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PROVIDE ( GPSPI2 = 0x60010000 );
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@@ -6,7 +6,7 @@
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PROVIDE ( TRACE0 = 0x60000000 );
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PROVIDE ( TRACE1 = 0x60001000 );
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PROVIDE ( ASSIST_DEBUG = 0x60002000 );
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PROVIDE ( BUS_MONITOR = 0x60002000 );
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PROVIDE ( INTPRI = 0x60005000 );
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PROVIDE ( CACHE = 0x60008000 );
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PROVIDE ( GPSPI2 = 0x60010000 );
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@@ -5,7 +5,6 @@
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*/
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#pragma once
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#include <stdint.h>
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#include "soc/soc.h"
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#ifdef __cplusplus
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extern "C" {
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