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Merge branch 'feat/p4_eco5_real_chip_v5.4' into 'release/v5.4'

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p4: p4 eco5 real chip (v5.4)

See merge request espressif/esp-idf!42063
This commit is contained in:
morris
2025-10-26 22:38:34 +08:00
parent 2de7923716 a70a29b7a6
commit 80971b25da
42 changed files with 2097 additions and 84 deletions
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components/soc/CMakeLists.txt
+5 -1
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@@ -20,7 +20,11 @@ endif()
# register headers that generated by script from CSV
if(CONFIG_IDF_TARGET_ESP32P4)
list(APPEND includes "${target_folder}/register/hw_ver1")
if(CONFIG_ESP32P4_SELECTS_REV_LESS_V3)
list(APPEND includes "${target_folder}/register/hw_ver1")
else()
list(APPEND includes "${target_folder}/register/hw_ver3")
endif()
else()
if(EXISTS "${CMAKE_CURRENT_SOURCE_DIR}/${target_folder}/register")
list(APPEND includes "${target_folder}/register")
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
-4
View File
@@ -2071,10 +2071,6 @@ config SOC_MEM_TCM_SUPPORTED
bool
default y
config SOC_MEM_NON_CONTIGUOUS_SRAM
bool
default y
config SOC_ASYNCHRONOUS_BUS_ERROR_MODE
bool
default y
components/soc/esp32p4/include/soc/soc_caps.h
-1
View File
@@ -773,7 +773,6 @@
/*-------------------------- Memory CAPS --------------------------*/
#define SOC_MEM_TCM_SUPPORTED (1)
#define SOC_MEM_NON_CONTIGUOUS_SRAM (1)
#define SOC_ASYNCHRONOUS_BUS_ERROR_MODE (1)
/*--------------------------- EMAC --------------------------------*/
#define SOC_EMAC_IEEE_1588_SUPPORT (1) /*!< EMAC Supports IEEE1588 time stamping */