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feat(lcd): re-support i80 lcd and support underrun inerrupt on p4 rev 3.0
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@@ -25,6 +25,9 @@ extern "C" {
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#define LCD_LL_EVENT_VSYNC_END (1 << 0)
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#define LCD_LL_EVENT_TRANS_DONE (1 << 1)
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#define LCD_LL_EVENT_I80 LCD_LL_EVENT_TRANS_DONE
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#define LCD_LL_EVENT_RGB LCD_LL_EVENT_VSYNC_END
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#define LCD_LL_CLK_FRAC_DIV_N_MAX 256 // LCD_CLK = LCD_CLK_S / (N + b/a), the N register is 8 bit-width
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#define LCD_LL_CLK_FRAC_DIV_AB_MAX 64 // LCD_CLK = LCD_CLK_S / (N + b/a), the a/b register is 6 bit-width
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#define LCD_LL_PCLK_DIV_MAX 64 // LCD_PCLK = LCD_CLK / MO, the MO register is 6 bit-width
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