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feat(lcd): re-support i80 lcd and support underrun inerrupt on p4 rev 3.0
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@@ -13,6 +13,7 @@
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#include "soc/lcd_cam_struct.h"
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#include "hal/assert.h"
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#include "hal/lcd_types.h"
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#include "hal/config.h"
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#include "soc/hp_sys_clkrst_struct.h"
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#ifdef __cplusplus
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@@ -25,6 +26,16 @@ extern "C" {
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#define LCD_LL_EVENT_VSYNC_END (1 << 0)
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#define LCD_LL_EVENT_TRANS_DONE (1 << 1)
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// Underrun interrupt is only supported on ESP32P4 Rev. 3.0 and later
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#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
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#define LCD_LL_EVENT_UNDERRUN (1 << 4)
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#else
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#define LCD_LL_EVENT_UNDERRUN 0
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#endif
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#define LCD_LL_EVENT_I80 LCD_LL_EVENT_TRANS_DONE | LCD_LL_EVENT_UNDERRUN
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#define LCD_LL_EVENT_RGB LCD_LL_EVENT_VSYNC_END | LCD_LL_EVENT_UNDERRUN
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#define LCD_LL_CLK_FRAC_DIV_N_MAX 256 // LCD_CLK = LCD_CLK_S / (N + b/a), the N register is 8 bit-width
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#define LCD_LL_CLK_FRAC_DIV_AB_MAX 64 // LCD_CLK = LCD_CLK_S / (N + b/a), the a/b register is 6 bit-width
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#define LCD_LL_PCLK_DIV_MAX 64 // LCD_PCLK = LCD_CLK / MO, the MO register is 6 bit-width
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@@ -721,9 +732,9 @@ static inline void lcd_ll_set_delay_ticks(lcd_cam_dev_t *dev, uint32_t hsync_del
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static inline void lcd_ll_enable_interrupt(lcd_cam_dev_t *dev, uint32_t mask, bool en)
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{
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if (en) {
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dev->lc_dma_int_ena.val |= mask & 0x03;
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dev->lc_dma_int_ena.val |= mask & 0x13;
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} else {
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dev->lc_dma_int_ena.val &= ~(mask & 0x03);
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dev->lc_dma_int_ena.val &= ~(mask & 0x13);
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}
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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@@ -742,7 +753,7 @@ static inline void lcd_ll_enable_interrupt(lcd_cam_dev_t *dev, uint32_t mask, bo
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__attribute__((always_inline))
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static inline uint32_t lcd_ll_get_interrupt_status(lcd_cam_dev_t *dev)
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{
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return dev->lc_dma_int_st.val & 0x03;
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return dev->lc_dma_int_st.val & 0x13;
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}
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/**
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@@ -754,7 +765,7 @@ static inline uint32_t lcd_ll_get_interrupt_status(lcd_cam_dev_t *dev)
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__attribute__((always_inline))
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static inline void lcd_ll_clear_interrupt_status(lcd_cam_dev_t *dev, uint32_t mask)
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{
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dev->lc_dma_int_clr.val = mask & 0x03;
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dev->lc_dma_int_clr.val = mask & 0x13;
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}
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/**
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