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Merge branch 'feat/support_esp32s31_icg_control' into 'master'

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feat(esp_hw_support): support PMU clock ICG management for esp32s31

Closes PM-760

See merge request espressif/esp-idf!48863
This commit is contained in:
Wu Zheng Hui
2026-06-18 16:21:32 +08:00
parent 344edcd13f 61be47b739
commit 7e4773ef38
41 changed files with 215 additions and 87 deletions
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components/esp_hw_support/include/esp_private/esp_pmu.h
+2 -1
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@@ -19,6 +19,7 @@
#include "hal/pmu_hal.h"
#include "pmu_param.h"
#include "pmu_bit_defs.h"
#include "soc/pmu_icg_mapping.h"
#endif
#ifdef __cplusplus
@@ -278,7 +279,7 @@ uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t sleep_flags, soc_rtc_slow_clk
* @return hardware time overhead in us
*/
const pmu_sleep_config_t* pmu_sleep_config_default(pmu_sleep_config_t *config, uint32_t sleep_flags, uint32_t clk_flags, uint32_t adjustment, soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp);
const pmu_sleep_config_t* pmu_sleep_config_default(pmu_sleep_config_t *config, uint32_t sleep_flags, pmu_sleep_clk_icg_flags_t clk_flags, uint32_t adjustment, soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp);
/**
* @brief Prepare the chip to enter sleep mode
components/esp_hw_support/include/esp_private/esp_sleep_internal.h
+5 -1
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@@ -8,6 +8,7 @@
#include <stdbool.h>
#include "sdkconfig.h"
#include "esp_sleep.h"
#include "hal/uart_types.h"
#ifdef __cplusplus
extern "C" {
@@ -134,7 +135,7 @@ void esp_sleep_restore_isolated_digital_gpio(void);
*/
typedef enum {
ESP_SLEEP_CLOCK_IOMUX, //!< The clock ICG cell mapping of IOMUX
ESP_SLEEP_CLOCK_LEDC, //!< The clock ICG cell mapping of LEDC
ESP_SLEEP_CLOCK_LEDC0, //!< The clock ICG cell mapping of LEDC0
ESP_SLEEP_CLOCK_UART0, //!< The clock ICG cell mapping of UART0
ESP_SLEEP_CLOCK_UART1, //!< The clock ICG cell mapping of UART1
#if SOC_UART_HP_NUM > 2
@@ -152,6 +153,9 @@ typedef enum {
ESP_SLEEP_CLOCK_MAX //!< Number of ICG cells
} esp_sleep_clock_t;
// Get UART sleep clock with giving uart num (num must be a valid HP UART port)
#define SLEEP_UART_ICG(num) ((esp_sleep_clock_t)(ESP_SLEEP_CLOCK_UART0 + (num)))
/**
* @brief Clock ICG options
*/