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docs: Update zh_CN translation for MR32736
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@@ -138,7 +138,7 @@ The Ethernet driver is composed of two parts: MAC and PHY.
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* Force the PHY device to reset status (as the case *a* in the picture). **This could fail for some PHY device** (i.e. it still outputs signals to GPIO0 even in reset state).
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.. warning::
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If you want the **Ethernet to work with WiFi**, don’t select ESP32 as source of ``REF_CLK`` as it would result in ``REF_CLK`` instability. Either disable WiFi or use a PHY or an external oscillator as the ``REF_CLK`` source.
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If you want the **Ethernet to work with Wi-Fi**, don’t select ESP32 as source of ``REF_CLK`` as it would result in ``REF_CLK`` instability. Either disable Wi-Fi or use a PHY or an external oscillator as the ``REF_CLK`` source.
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**No matter which RMII clock mode you select, you really need to take care of the signal integrity of REF_CLK in your hardware design!** Keep the trace as short as possible. Keep it away from RF devices and inductor elements.
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