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Merge branch 'fix/move_cache_lock_workaround_out_of_ipc_stall_v6.0' into 'release/v6.0'
fix(esp_hw_support): disable esp32 livelock workaround before stall another core (v6.0) See merge request espressif/esp-idf!50770
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@@ -1187,16 +1187,18 @@ static esp_err_t FORCE_IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
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esp_clk_private_lock(); // Maybe acquired from esp_clk_slowclk_cal_set
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esp_clk_private_lock(); // Maybe acquired from esp_clk_slowclk_cal_set
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#endif
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#endif
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#if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
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// The other core will be stalled by high-priority interrupt and spins on variables in internal RAM,
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// which naturally avoids cache livelock, so the 20ms livelock workaround timeout is not needed.
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// Must do it before stalling another core, since s_iwdt_configure_lock spinlock is acquired in
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// esp_int_wdt_livelock_workaround, which may cause deadlock.
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esp_int_wdt_livelock_workaround(false);
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#endif
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/* Disable interrupts and stall another core in case another task writes
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/* Disable interrupts and stall another core in case another task writes
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* to RTC memory while we calculate RTC memory CRC.
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* to RTC memory while we calculate RTC memory CRC.
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*/
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*/
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esp_ipc_isr_stall_other_cpu();
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esp_ipc_isr_stall_other_cpu();
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esp_ipc_isr_stall_pause();
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esp_ipc_isr_stall_pause();
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#if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
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// The other core will be stalled by high-priority interrupt and spins on variables in internal RAM,
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// which naturally avoids cache livelock, so the 20ms livelock workaround timeout is not needed.
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esp_int_wdt_livelock_workaround(false);
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#endif
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// record current RTC time
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// record current RTC time
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s_config.rtc_ticks_at_sleep_start = rtc_time_get();
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s_config.rtc_ticks_at_sleep_start = rtc_time_get();
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@@ -1263,12 +1265,13 @@ static esp_err_t FORCE_IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
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ESP_INFINITE_LOOP();
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ESP_INFINITE_LOOP();
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}
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}
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// Never returns here, except that the sleep is rejected.
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// Never returns here, except that the sleep is rejected.
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esp_ipc_isr_stall_resume();
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esp_ipc_isr_release_other_cpu();
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#if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
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#if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
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// Configure WDT to use livelock workaround timeout after releasing other CPU
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// Configure WDT to use livelock workaround timeout after releasing other CPU
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esp_int_wdt_livelock_workaround(true);
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esp_int_wdt_livelock_workaround(true);
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#endif
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#endif
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esp_ipc_isr_stall_resume();
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esp_ipc_isr_release_other_cpu();
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#if !CONFIG_FREERTOS_UNICORE
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#if !CONFIG_FREERTOS_UNICORE
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esp_clk_private_unlock();
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esp_clk_private_unlock();
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esp_os_exit_critical_safe(&rtc_spinlock);
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esp_os_exit_critical_safe(&rtc_spinlock);
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