mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-02 11:10:54 +03:00
Merge branch 'bugfix/gpio_dump_io_config_v5.3' into 'release/v5.3'
fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32 (v5.3) See merge request espressif/esp-idf!37909
This commit is contained in:
@@ -301,7 +301,7 @@ typedef union {
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* set this value: s=0-53: connect GPIO[s] to this port. s=0x38: set this port always
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* high level. s=0x3C: set this port always low level.
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*/
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uint32_t func_sel:5;
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uint32_t in_sel:5;
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/** in_inv_sel : R/W; bitpos: [5]; default: 0;
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* set this bit to invert input signal. 1:invert. 0:not invert.
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*/
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@@ -325,7 +325,7 @@ typedef union {
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* output of GPIO[n] equals input of peripheral[s]. s=256: output of GPIO[n] equals
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* GPIO_OUT_REG[n].
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*/
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uint32_t func_sel:8;
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uint32_t out_sel:8;
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/** out_inv_sel : R/W; bitpos: [8]; default: 0;
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* set this bit to invert output signal.1:invert.0:not invert.
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*/
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@@ -1,16 +1,8 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _SOC_GPIO_STRUCT_H_
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#define _SOC_GPIO_STRUCT_H_
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#include <stdint.h>
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@@ -190,7 +182,7 @@ typedef volatile struct gpio_dev_s {
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uint32_t reserved_150;
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union {
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struct {
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uint32_t func_sel: 5;
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uint32_t in_sel: 5;
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uint32_t sig_in_inv: 1;
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uint32_t sig_in_sel: 1;
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uint32_t reserved7: 25;
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@@ -327,7 +319,7 @@ typedef volatile struct gpio_dev_s {
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uint32_t reserved_550;
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union {
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struct {
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uint32_t func_sel: 8;
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uint32_t out_sel: 8;
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uint32_t inv_sel: 1;
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uint32_t oen_sel: 1;
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uint32_t oen_inv_sel: 1;
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -33,7 +33,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** out_w1ts : WT; bitpos: [7:0]; default: 0;
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/** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to enable the output register LP_IO_OUT_REG of GPIO0 ~
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* GPIO7.\\
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*
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@@ -42,7 +42,7 @@ typedef union {
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* will be set to 1.
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* - Recommended operation: use this register to set LP_IO_OUT_REG.
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*/
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uint32_t out_w1ts:8;
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uint32_t out_data_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -53,7 +53,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** out_w1tc : WT; bitpos: [7:0]; default: 0;
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/** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to clear the output register LP_IO_OUT_REG of GPIO0 ~
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* GPIO7.\\
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*
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@@ -62,7 +62,7 @@ typedef union {
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* will be cleared.
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* - Recommended operation: use this register to clear LP_IO_OUT_REG.
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*/
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uint32_t out_w1tc:8;
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uint32_t out_data_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -90,7 +90,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** enable_w1ts : WT; bitpos: [7:0]; default: 0;
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/** out_enable_w1ts : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to set the output enable register LP_IO_ENABLE_REG of
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* GPIO0 ~ GPIO7.\\
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*
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@@ -99,7 +99,7 @@ typedef union {
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* LP_IO_ENABLE_REG will be set to 1.
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* - Recommended operation: use this register to set LP_IO_ENABLE_REG.
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*/
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uint32_t enable_w1ts:8;
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uint32_t out_enable_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -110,7 +110,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** enable_w1tc : WT; bitpos: [7:0]; default: 0;
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/** out_enable_w1tc : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to clear the output enable register LP_IO_ENABLE_REG of
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* GPIO0 ~ GPIO7.\\
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*
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@@ -119,7 +119,7 @@ typedef union {
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* LP_IO_ENABLE_REG will be cleared.
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* - Recommended operation: use this register to clear LP_IO_ENABLE_REG.
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*/
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uint32_t enable_w1tc:8;
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uint32_t out_enable_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -165,7 +165,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** status_w1ts : WT; bitpos: [7:0]; default: 0;
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/** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to set the interrupt status register LP_IO_STATUS_INT of
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* GPIO0 ~ GPIO7.\\
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*
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@@ -174,7 +174,7 @@ typedef union {
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* LP_IO_STATUS_INT will be set to 1.
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* - Recommended operation: use this register to set LP_IO_STATUS_INT.
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*/
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uint32_t status_w1ts:8;
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uint32_t status_intr_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -185,7 +185,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** status_w1tc : WT; bitpos: [7:0]; default: 0;
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/** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to clear the interrupt status register LP_IO_STATUS_INT
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* of GPIO0 ~ GPIO7. \\
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*
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@@ -194,7 +194,7 @@ typedef union {
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* LP_IO_STATUS_INT will be cleared
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* - ecommended operation: use this register to clear LP_IO_STATUS_INT.
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*/
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uint32_t status_w1tc:8;
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uint32_t status_intr_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -30,10 +30,10 @@ typedef union {
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*/
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typedef union {
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struct {
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/** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
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/** out_w1ts : WT; bitpos: [7:0]; default: 0;
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* set one time output data
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*/
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uint32_t out_data_w1ts:8;
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uint32_t out_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -44,10 +44,10 @@ typedef union {
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*/
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typedef union {
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struct {
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/** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
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/** out_w1tc : WT; bitpos: [7:0]; default: 0;
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* clear one time output data
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*/
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uint32_t out_data_w1tc:8;
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uint32_t out_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -114,10 +114,10 @@ typedef union {
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*/
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typedef union {
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struct {
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/** status_w1ts : WT; bitpos: [7:0]; default: 0;
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/** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
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* set one time output data
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*/
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uint32_t status_w1ts:8;
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uint32_t status_intr_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -128,10 +128,10 @@ typedef union {
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*/
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typedef union {
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struct {
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/** status_w1tc : WT; bitpos: [7:0]; default: 0;
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/** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
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* clear one time output data
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*/
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uint32_t status_w1tc:8;
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uint32_t status_intr_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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