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feat(esp_hw_support): isolate all digital io to suppress pad leakage on TOP pd sleep

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This commit is contained in:
wuzhenghui
2026-05-07 08:39:56 +08:00
parent 8d3732c053
commit 7c10126309
12 changed files with 321 additions and 75 deletions
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components/esp_hal_gpspi/esp32s31/include/soc/spi_pins.h
+6 -6
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@@ -10,12 +10,12 @@
// On S31, SPI pins defined here are all wrong. these pins are individual pins, don't use normal GPIO pins anymore.
#define GPIO_NUM_INVALID -1
#define MSPI_IOMUX_PIN_NUM_CS1 GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_HD GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_WP GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_CS0 GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_CLK GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_MISO GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_MOSI GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_HD 30
#define MSPI_IOMUX_PIN_NUM_WP 28
#define MSPI_IOMUX_PIN_NUM_CS0 26
#define MSPI_IOMUX_PIN_NUM_CLK 31
#define MSPI_IOMUX_PIN_NUM_MISO 27
#define MSPI_IOMUX_PIN_NUM_MOSI 32
#define MSPI_IOMUX_PIN_NUM_D4 GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_D5 GPIO_NUM_INVALID
#define MSPI_IOMUX_PIN_NUM_D6 GPIO_NUM_INVALID