Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-09-22 13:01:16 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'refactor/dac_priv_dma_callbacks' into 'master'

Browse Source 
refactor(dac): move DMA interrupt handling behind dac_priv_dma callbacks

See merge request espressif/esp-idf!51860
This commit is contained in:
morris
2026-08-24 10:23:51 +08:00
parent a9de6a4f30 18e0614798
commit 7b9cc1ac79
9 changed files with 332 additions and 263 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
docs/zh_CN/api-reference/peripherals/dac.rst
View File

@@ -87,7 +87,7 @@ DAC 通道可以通过 DMA 连续转换数字信号，这种模式下有三种
DAC 的数字控制器的时钟也来自 I2S0，有以下两种时钟源可选：
- :cpp:enumerator:`dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_PLL_D2` 支持 19.6 KHz 到若干 MHz 之间的频率。该时钟源为默认时钟源，也可通过选择 :cpp:enumerator:`dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_DEFAULT` 来启用该时钟源。
- :cpp:enumerator:`dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_PLL_160M` 支持 19.6 KHz 到若干 MHz 之间的频率。该时钟源为默认时钟源，也可通过选择 :cpp:enumerator:`dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_DEFAULT` 来启用该时钟源。
- :cpp:enumerator:`dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_APLL` 支持 648 Hz 到若干 MHz 之间的频率。该时钟源可能会被其他外设占用而导致频率无法更改，此时除非 APLL 仍能准确分频得到 DAC DMA 的目标频率，否则将无法使用该时钟源。
.. only:: esp32s2