From 7b891845368473531a4fe022bd11eef94a2c3d36 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Thu, 2 Jul 2026 10:43:22 +0800 Subject: [PATCH] change(esp_libc): use C5 ECO4 ROM newlib functions Co-authored-by: Cursor --- components/esp_hw_support/port/esp32c5/Kconfig.hw_support | 3 +++ components/esp_libc/Kconfig | 1 + components/esp_rom/esp32c5/esp_rom_caps.h | 2 +- 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/components/esp_hw_support/port/esp32c5/Kconfig.hw_support b/components/esp_hw_support/port/esp32c5/Kconfig.hw_support index d90eb136f3e..f79d39e04b2 100644 --- a/components/esp_hw_support/port/esp32c5/Kconfig.hw_support +++ b/components/esp_hw_support/port/esp32c5/Kconfig.hw_support @@ -13,12 +13,15 @@ choice ESP32C5_REV_MIN bool "Rev v1.0 (ECO2)" config ESP32C5_REV_MIN_102 bool "Rev v1.2" + config ESP32C5_REV_MIN_103 + bool "Rev v1.3" endchoice config ESP32C5_REV_MIN_FULL int default 100 if ESP32C5_REV_MIN_100 default 102 if ESP32C5_REV_MIN_102 + default 103 if ESP32C5_REV_MIN_103 config ESP_REV_MIN_FULL int diff --git a/components/esp_libc/Kconfig b/components/esp_libc/Kconfig index 6c7447c9d60..65fecf06c7b 100644 --- a/components/esp_libc/Kconfig +++ b/components/esp_libc/Kconfig @@ -177,6 +177,7 @@ menu "LibC" bool "Use performance-optimized memXXX/strXXX functions on misaligned memory access" default y depends on ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY + depends on !(IDF_TARGET_ESP32C5 && ESP32C5_REV_MIN_FULL >= 103) help Enables performance-optimized implementations of memory and string functions when handling misaligned memory. diff --git a/components/esp_rom/esp32c5/esp_rom_caps.h b/components/esp_rom/esp32c5/esp_rom_caps.h index 1bb7b29fbae..b52761060d0 100644 --- a/components/esp_rom/esp32c5/esp_rom_caps.h +++ b/components/esp_rom/esp32c5/esp_rom_caps.h @@ -34,7 +34,7 @@ #define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage. #define ESP_ROM_HAS_OUTPUT_PUTC_FUNC (1) // ROM has esp_rom_output_putc (or ets_write_char_uart) #define ESP_ROM_CLIC_INT_THRESH_PATCH (1) // ROM version of esprv_intc_int_set_threshold incorrectly assumes lowest MINTTHRESH is 0x1F, should be 0xF -#define ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY (1) // ROM mem/str functions are not optimized well for misaligned memory access. +#define ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY (1) // ROM mem/str functions before ECO4 are not optimized well for misaligned memory access. #define ESP_ROM_DELAY_US_PATCH (1) // ROM ets_delay_us needs patch for U-mode operation #define ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP (1) // ROM supports the secure boot fast wakeup feature #define ESP_ROM_ECDSA_VERIFY_PATCH (1) // ROM ets_ecdsa_verify API requires a software patch