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https://github.com/espressif/esp-idf.git
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fix(newlib): adapt changes
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@@ -1,7 +0,0 @@
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# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
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components/newlib/test_apps/newlib:
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14415
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@@ -0,0 +1,162 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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#include <stdint.h>
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#include <string.h>
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#include "esp_heap_caps.h"
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#include "soc/soc.h"
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#include "hal/cpu_ll.h"
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#include "unity.h"
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#define MAX_MEMTEST_SIZE 4096
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wincompatible-pointer-types"
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#pragma GCC diagnostic ignored "-Wstrict-prototypes"
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uint32_t test_function_dest_src_size(void (*foo)(...), bool pass_size)
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{
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uint32_t ccount1, ccount2;
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char* test_des = heap_caps_aligned_alloc(32, MAX_MEMTEST_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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char* test_src = heap_caps_aligned_alloc(32, MAX_MEMTEST_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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TEST_ASSERT_NOT_NULL(test_des);
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TEST_ASSERT_NOT_NULL(test_src);
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/* Prepare arrays for X-cmp functions to make the algorithm go through whole buffers. */
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memset(test_src, 'a', MAX_MEMTEST_SIZE);
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test_src[MAX_MEMTEST_SIZE - 1] = 0;
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memset(test_des, 'a', MAX_MEMTEST_SIZE);
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test_des[MAX_MEMTEST_SIZE - 1] = 'b';
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test_des[MAX_MEMTEST_SIZE - 1] = 0;
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ccount1 = esp_cpu_get_cycle_count();
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if (pass_size) {
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foo(test_des + 1, test_src + 2, MAX_MEMTEST_SIZE - 2);
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} else {
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foo(test_des + 1, test_src + 2);
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}
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ccount2 = esp_cpu_get_cycle_count();
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heap_caps_free(test_des);
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heap_caps_free(test_src);
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return ccount2 - ccount1;
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}
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TEST_CASE("memcpy", "[misaligned_mem]")
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{
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uint32_t ccount = test_function_dest_src_size(memcpy, true);
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/* esp32c2: 4128 cycles instead 28676. */
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TEST_ASSERT_LESS_THAN(10000, ccount);
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}
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TEST_CASE("memcmp", "[misaligned_mem]")
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{
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uint32_t ccount = test_function_dest_src_size(memcmp, true);
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/* esp32c2: 14259 cycles instead 49147. */
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TEST_ASSERT_LESS_THAN(20000, ccount);
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}
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TEST_CASE("memmove", "[misaligned_mem]")
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{
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uint32_t ccount = test_function_dest_src_size(memmove, true);
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/* esp32c2: 8086 cycles instead 33896. */
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TEST_ASSERT_LESS_THAN(15000, ccount);
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}
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TEST_CASE("memmove - overlapping", "[misaligned_mem]")
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{
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uint32_t ccount1, ccount2;
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char* buf = heap_caps_aligned_alloc(32, MAX_MEMTEST_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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TEST_ASSERT_NOT_NULL(buf);
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ccount1 = esp_cpu_get_cycle_count();
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memmove(buf + 5, buf + 2, MAX_MEMTEST_SIZE - 5);
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ccount2 = esp_cpu_get_cycle_count();
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heap_caps_free(buf);
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/* esp32c2: 11503 cycles instead 45024. */
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TEST_ASSERT_LESS_THAN(20000, ccount2 - ccount1);
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}
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TEST_CASE("strcpy", "[misaligned_mem]")
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{
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uint32_t ccount = test_function_dest_src_size(strcpy, false);
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/* esp32c2: 17313 cycles instead 32771. */
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TEST_ASSERT_LESS_THAN(22000, ccount);
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}
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TEST_CASE("strcmp", "[misaligned_mem]")
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{
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uint32_t ccount = test_function_dest_src_size(strcmp, false);
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/* esp32c2: 13191 cycles instead 32775. */
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TEST_ASSERT_LESS_THAN(20000, ccount);
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}
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TEST_CASE("strncpy", "[misaligned_mem]")
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{
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uint32_t ccount = test_function_dest_src_size(strncpy, true);
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/* esp32c2: 21475 cycles instead 36859. */
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TEST_ASSERT_LESS_THAN(25000, ccount);
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}
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TEST_CASE("strncmp", "[misaligned_mem]")
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{
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uint32_t ccount = test_function_dest_src_size(strncmp, true);
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/* esp32c2: 24369 cycles instead 49141. */
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TEST_ASSERT_LESS_THAN(30000, ccount);
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}
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#pragma GCC diagnostic pop // "-Wincompatible-pointer-types" "-Wstrict-prototypes"
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static bool fn_in_ram(void *fn)
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{
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const int fnaddr = (int)fn;
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return (fnaddr >= SOC_IRAM_LOW && fnaddr < SOC_IRAM_HIGH);
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}
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TEST_CASE("mem functions in IRAM", "[misaligned_mem]")
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{
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TEST_ASSERT_TRUE(fn_in_ram(memcpy));
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TEST_ASSERT_TRUE(fn_in_ram(memcmp));
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TEST_ASSERT_TRUE(fn_in_ram(memmove));
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TEST_ASSERT_TRUE(fn_in_ram(strcpy));
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TEST_ASSERT_TRUE(fn_in_ram(strncpy));
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TEST_ASSERT_TRUE(fn_in_ram(strcmp));
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TEST_ASSERT_TRUE(fn_in_ram(strncmp));
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}
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#if CONFIG_ESP_SYSTEM_MEMPROT_PMP
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TEST_CASE("access across different PMP regions", "[misaligned_mem]")
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{
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/*
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* PMP configurations for load and store addresses may
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* have different permissions (e.g., "R" vs. "RW").
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*
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* Due to the timing alignment of internal signals, the address
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* permission check may be incorrectly applied during the second
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* part of a misaligned access transaction.
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*
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* As a workaround, insert two instructions (e.g. ADDI/NOP) between
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* accessing to different memory regions. This spacing avoids the
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* false permission check caused by signal timing overlap.
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*
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* This test may help identify the root issue in affected chips.
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*/
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const void *src = (void *) SOC_DROM_MASK_LOW;
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asm volatile("addi sp, sp, -16\n"
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"lw t0, 2(%0)\n"
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#if CONFIG_SOC_CPU_MISALIGNED_ACCESS_ON_PMP_MISMATCH_ISSUE
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"nop\n"
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"nop\n"
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#endif
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"sw t0, 3(sp)\n"
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"addi sp, sp, 16"
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:: "r"(src) : "memory");
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}
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#endif
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@@ -10,6 +10,7 @@
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#include <stdlib.h>
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#include <string.h>
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#include <time.h>
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#include <signal.h>
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#include <sys/time.h>
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#include <wchar.h>
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#include <unistd.h>
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@@ -0,0 +1,10 @@
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# The following lines of boilerplate have to be in your project's
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# CMakeLists in this exact order for cmake to work correctly
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cmake_minimum_required(VERSION 3.22)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
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idf_build_set_property(MINIMAL_BUILD ON)
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project(test_build)
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@@ -0,0 +1,6 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
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This project tests building with the no_rvfplib configuration.
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This project uses MINIMAL_BUILD=y to reduce build time and dependencies.
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@@ -0,0 +1,2 @@
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idf_component_register(SRCS "test_main.c"
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INCLUDE_DIRS ".")
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@@ -0,0 +1,8 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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void app_main(void)
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{
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}
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@@ -0,0 +1,2 @@
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CONFIG_IDF_TARGET="esp32c2"
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CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y
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