diff --git a/components/esp_adc/adc_continuous.c b/components/esp_adc/adc_continuous.c
index c3757afd32c..6078ce58ac8 100644
--- a/components/esp_adc/adc_continuous.c
+++ b/components/esp_adc/adc_continuous.c
@@ -341,6 +341,10 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
     adc_hal_digi_connect(true);
     adc_hal_digi_enable(true);
 
+#if ADC_LL_DEFAULT_CONV_LIMIT_EN
+    adc_ll_digi_convert_limit_enable(false);
+#endif
+
     return ESP_OK;
 }
 
diff --git a/components/hal/esp32/include/hal/adc_ll.h b/components/hal/esp32/include/hal/adc_ll.h
index 374be22c640..97cc5de8c78 100644
--- a/components/hal/esp32/include/hal/adc_ll.h
+++ b/components/hal/esp32/include/hal/adc_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -7,6 +7,7 @@
 #pragma once
 
 #include <stdbool.h>
+#include "esp_rom_sys.h"
 #include "hal/adc_types.h"
 #include "hal/misc.h"
 #include "hal/assert.h"
@@ -44,7 +45,7 @@ extern "C" {
 
 //On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_LL_DEFAULT_CONV_LIMIT_NUM != 0`
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      1
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 /*---------------------------------------------------------------
                     PWDET (Power Detect)
@@ -154,6 +155,8 @@ static inline void adc_ll_digi_set_convert_limit_num(uint32_t meas_num)
  */
 static inline void adc_ll_digi_convert_limit_enable(bool enable)
 {
+    //ESP32 has a hardware limitaton, meas_num_limit can only be cleared after ADC enters sample phase(10~15us after start)
+    esp_rom_delay_us(60);
     SYSCON.saradc_ctrl2.meas_num_limit = enable;
 }
 
diff --git a/components/hal/esp32c3/include/hal/adc_ll.h b/components/hal/esp32c3/include/hal/adc_ll.h
index 779312f4fa9..d273eaf70f3 100644
--- a/components/hal/esp32c3/include/hal/adc_ll.h
+++ b/components/hal/esp32c3/include/hal/adc_ll.h
@@ -58,7 +58,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 /**
  * Workaround: on ESP32C3, the internal hardware counter that counts ADC samples will not be automatically cleared,
diff --git a/components/hal/esp32c5/include/hal/adc_ll.h b/components/hal/esp32c5/include/hal/adc_ll.h
index c92233a097f..f0e914e7bcd 100644
--- a/components/hal/esp32c5/include/hal/adc_ll.h
+++ b/components/hal/esp32c5/include/hal/adc_ll.h
@@ -59,7 +59,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 #define ADC_LL_POWER_MANAGE_SUPPORTED     1 //ESP32C5 supported to manage power mode
 /*---------------------------------------------------------------
diff --git a/components/hal/esp32c6/include/hal/adc_ll.h b/components/hal/esp32c6/include/hal/adc_ll.h
index f2b0640c0cb..11c89c5cde8 100644
--- a/components/hal/esp32c6/include/hal/adc_ll.h
+++ b/components/hal/esp32c6/include/hal/adc_ll.h
@@ -58,7 +58,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 #define ADC_LL_POWER_MANAGE_SUPPORTED     1 //ESP32C6 supported to manage power mode
 /*---------------------------------------------------------------
diff --git a/components/hal/esp32c61/include/hal/adc_ll.h b/components/hal/esp32c61/include/hal/adc_ll.h
index 478d6f72f10..5f1d12c9338 100644
--- a/components/hal/esp32c61/include/hal/adc_ll.h
+++ b/components/hal/esp32c61/include/hal/adc_ll.h
@@ -59,7 +59,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 #define ADC_LL_POWER_MANAGE_SUPPORTED     1 //ESP32C61 supported to manage power mode
 /*---------------------------------------------------------------
diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h
index a4b4dabdda0..8e0791bc4e8 100644
--- a/components/hal/esp32h2/include/hal/adc_ll.h
+++ b/components/hal/esp32h2/include/hal/adc_ll.h
@@ -59,7 +59,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 #define ADC_LL_POWER_MANAGE_SUPPORTED     1 //ESP32H2 supported to manage power mode
 /*---------------------------------------------------------------
diff --git a/components/hal/esp32p4/include/hal/adc_ll.h b/components/hal/esp32p4/include/hal/adc_ll.h
index 20d94c8df07..faffd7a9cd3 100644
--- a/components/hal/esp32p4/include/hal/adc_ll.h
+++ b/components/hal/esp32p4/include/hal/adc_ll.h
@@ -56,7 +56,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 #define ADC_LL_POWER_MANAGE_SUPPORTED     1 //ESP32P4 supported to manage power mode
 /*---------------------------------------------------------------
diff --git a/components/hal/esp32s2/include/hal/adc_ll.h b/components/hal/esp32s2/include/hal/adc_ll.h
index add16dc3c9b..50fe537ade4 100644
--- a/components/hal/esp32s2/include/hal/adc_ll.h
+++ b/components/hal/esp32s2/include/hal/adc_ll.h
@@ -57,7 +57,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 /*---------------------------------------------------------------
                     PWDET (Power Detect)
diff --git a/components/hal/esp32s3/include/hal/adc_ll.h b/components/hal/esp32s3/include/hal/adc_ll.h
index 6911924b0d2..dafc5a0b81e 100644
--- a/components/hal/esp32s3/include/hal/adc_ll.h
+++ b/components/hal/esp32s3/include/hal/adc_ll.h
@@ -59,7 +59,7 @@ extern "C" {
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     255
 
 /*---------------------------------------------------------------
                     PWDET (Power Detect)