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feat(esp_hw_support): support main power control during VBAT powered deep sleep

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This commit is contained in:
wuzhenghui
2026-05-08 14:24:35 +08:00
parent 5c2e3b768e
commit 799669c7a4
9 changed files with 117 additions and 8945 deletions
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components/esp_hal_pmu/esp32p4/include/hal/pmu_ll.h
+24
View File
@@ -634,12 +634,36 @@ FORCE_INLINE_ATTR uint32_t pmu_ll_lp_get_digital_power_down_wait_cycle(pmu_dev_t
FORCE_INLINE_ATTR void pmu_ll_lp_set_analog_wait_target_cycle(pmu_dev_t *hw, uint32_t slow_clk_cycle)
{
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
HAL_ASSERT(slow_clk_cycle <= 1020);
uint32_t target = 0, expand = 0;
if (slow_clk_cycle <= 255) {
target = slow_clk_cycle;
expand = 0;
} else if (slow_clk_cycle <= 510) {
expand = 1;
target = (slow_clk_cycle + 1) >> 1;
} else if (slow_clk_cycle <= 1020) {
expand = 2;
target = (slow_clk_cycle + 3) >> 2;
}
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->wakeup.cntl5, lp_ana_wait_target, target);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->wakeup.cntl5, lp_ana_wait_target_expand, expand);
#else
HAL_ASSERT(slow_clk_cycle <= 255);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->wakeup.cntl5, lp_ana_wait_target, slow_clk_cycle);
#endif
}
FORCE_INLINE_ATTR uint32_t pmu_ll_lp_get_analog_wait_target_cycle(pmu_dev_t *hw)
{
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
uint32_t target = HAL_FORCE_READ_U32_REG_FIELD(hw->wakeup.cntl5, lp_ana_wait_target);
uint32_t expand = HAL_FORCE_READ_U32_REG_FIELD(hw->wakeup.cntl5, lp_ana_wait_target_expand);
return target << expand;
#else
return HAL_FORCE_READ_U32_REG_FIELD(hw->wakeup.cntl5, lp_ana_wait_target);
#endif
}
FORCE_INLINE_ATTR void pmu_ll_set_xtal_stable_wait_cycle(pmu_dev_t *hw, uint32_t cycle)
components/esp_hal_pmu/esp32p4/include/hal/vbat_ll.h
+2
View File
@@ -28,6 +28,8 @@ typedef enum {
#define VBAT_LL_CHARGER_MASK (BIT(27)|BIT(28))
#define VBAT_LL_DETECT_MASK (BIT(30))
#define VBAT_LL_LP_SLEEP_PROBE_ID (9)
#ifdef __cplusplus
extern "C" {
#endif