freertos: Fix delay between interrupt request and trigger on RISC-V

NOP instructions have been added in order to prevent the code
from executing code it shouldn't execute. This is due to a delay
between the moment an interrupt is requested and the moment it
is fired. It only happens on RISC-V SoC.

components/freertos/test/test_task_suspend_resume.c

@@ -89,9 +89,6 @@ TEST_CASE("Suspend/resume task on other core", "[freertos]")
 }
 #endif
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
-// TODO ESP32C3 IDF-2588
-
 /* Task suspends itself, then sets a flag and deletes itself */
 static void task_suspend_self(void *vp_resumed)
 {
@@ -118,7 +115,6 @@ TEST_CASE("Suspend the current running task", "[freertos]")
     // Shouldn't need any delay here, as task should resume on this CPU immediately
     TEST_ASSERT_TRUE(resumed);
 }
-#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
 
 
 volatile bool timer_isr_fired;