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feat(spi): support data output inversion
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@@ -65,6 +65,7 @@ extern "C"
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#define SPICOMMON_BUSFLAG_OCTAL (SPICOMMON_BUSFLAG_QUAD|SPICOMMON_BUSFLAG_IO4_IO7) ///< Check existing of MOSI/MISO/WP/HD/SPIIO4/SPIIO5/SPIIO6/SPIIO7 pins as output. Or indicates bus able to work under octal mode.
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#define SPICOMMON_BUSFLAG_NATIVE_PINS SPICOMMON_BUSFLAG_IOMUX_PINS
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#define SPICOMMON_BUSFLAG_SLP_ALLOW_PD (1<<9) ///< Allow to power down the peripheral during light sleep, and auto recover then.
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#define SPICOMMON_BUSFLAG_DATA_OUT_INV (1<<10) ///< Invert output data signals through the GPIO matrix.
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/**
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* @brief SPI DMA channels
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@@ -94,6 +95,9 @@ typedef spi_common_dma_t spi_dma_chan_t;
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* delay, which may cause incorrect read for >40MHz speeds.
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*
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* @note Be advised that the slave driver does not use the quadwp/quadhd lines and fields in spi_bus_config_t referring to these lines will be ignored and can thus safely be left uninitialized.
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* @note When `SPICOMMON_BUSFLAG_DATA_OUT_INV` is set in `flags`, all configured bus signals are routed through the GPIO matrix.
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* @note On ESP32, `data_io_default_level` only supports 0. When
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`SPICOMMON_BUSFLAG_DATA_OUT_INV` is set, the idle data level is also inverted.
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*/
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typedef struct {
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union {
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