From 05244449ba2861a64340d281a000037205455e68 Mon Sep 17 00:00:00 2001 From: Sudeep Mohanty Date: Wed, 29 Apr 2026 16:13:43 +0200 Subject: [PATCH] refactor(ulp): simplify LP core peripheral IO setup on matrix targets On SOC_LP_GPIO_MATRIX_SUPPORTED targets, route LP SPI, I2C, and remapped LP UART pins through lp_gpio_connect_* (rtcio_hal_matrix_* on release branches applies IOMUX and matrix routing). Remove redundant rtc_gpio_set_direction and rtc_gpio_iomux_func_sel before matrix connect for LP SPI and remapped LP UART pins. Non-matrix LP I2C: use rtc_gpio_iomux_output instead of rtc_gpio_iomux_func_sel. Non-matrix LP UART: use rtc_gpio_iomux_output and rtc_gpio_iomux_input for func sel and direction. --- components/ulp/lp_core/lp_core_i2c.c | 11 ++++++----- components/ulp/lp_core/lp_core_spi.c | 5 +---- components/ulp/lp_core/lp_core_uart.c | 26 +++++++++++++++++--------- 3 files changed, 24 insertions(+), 18 deletions(-) diff --git a/components/ulp/lp_core/lp_core_i2c.c b/components/ulp/lp_core/lp_core_i2c.c index 7761d8f28ba..56ac3205277 100644 --- a/components/ulp/lp_core/lp_core_i2c.c +++ b/components/ulp/lp_core/lp_core_i2c.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -89,15 +89,16 @@ static esp_err_t lp_i2c_set_pin(const lp_core_i2c_cfg_t *cfg) ESP_RETURN_ON_ERROR(lp_i2c_configure_io(sda_io_num, sda_pullup_en), LPI2C_TAG, "LP I2C SDA pin config failed"); #if !SOC_LP_GPIO_MATRIX_SUPPORTED + /* On targets that do not support the LP IO Matrix: assign SDA and SCL to the LP I2C + * RTC IOMUX function. lp_i2c_configure_io() already initialized the pads and open-drain direction. */ const i2c_signal_conn_t *p_i2c_pin = &i2c_periph_signal[LP_I2C_NUM_0]; - ret = rtc_gpio_iomux_func_sel(sda_io_num, p_i2c_pin->iomux_func); - ret = rtc_gpio_iomux_func_sel(scl_io_num, p_i2c_pin->iomux_func); + ret = rtc_gpio_iomux_output(sda_io_num, p_i2c_pin->iomux_func); + ret = rtc_gpio_iomux_output(scl_io_num, p_i2c_pin->iomux_func); #else - /* Connect the SDA pin of the LP_I2C peripheral to the LP_IO Matrix */ + /* On targets with the LP IO Matrix: route SDA and SCL to the LP I2C pad signals. */ ret = lp_gpio_connect_out_signal(sda_io_num, LP_I2C_SDA_PAD_OUT_IDX, 0, 0); ret = lp_gpio_connect_in_signal(sda_io_num, LP_I2C_SDA_PAD_IN_IDX, 0); - /* Connect the SCL pin of the LP_I2C peripheral to the LP_IO Matrix */ ret = lp_gpio_connect_out_signal(scl_io_num, LP_I2C_SCL_PAD_OUT_IDX, 0, 0); ret = lp_gpio_connect_in_signal(scl_io_num, LP_I2C_SCL_PAD_IN_IDX, 0); #endif /* !SOC_LP_GPIO_MATRIX_SUPPORTED */ diff --git a/components/ulp/lp_core/lp_core_spi.c b/components/ulp/lp_core/lp_core_spi.c index 0def39cc015..0acf8eed6f1 100644 --- a/components/ulp/lp_core/lp_core_spi.c +++ b/components/ulp/lp_core/lp_core_spi.c @@ -34,10 +34,7 @@ static esp_err_t lp_spi_config_io(gpio_num_t pin, rtc_gpio_mode_t direction, uin /* Initialize LP_IO */ ESP_RETURN_ON_ERROR(rtc_gpio_init(pin), LP_SPI_TAG, "LP IO Init failed for GPIO %d", pin); - /* Set LP_IO direction */ - ESP_RETURN_ON_ERROR(rtc_gpio_set_direction(pin, direction), LP_SPI_TAG, "LP IO Set direction failed for %d", pin); - - /* Connect the LP SPI signals to the LP_IO Matrix */ + /* Connect this LP_IO to the LP SPI pad-out and pad-in indices on the LP IO Matrix. */ ESP_RETURN_ON_ERROR(lp_gpio_connect_out_signal(pin, out_pad_idx, 0, 0), LP_SPI_TAG, "LP IO Matrix connect out signal failed for %d", pin); ESP_RETURN_ON_ERROR(lp_gpio_connect_in_signal(pin, in_pad_idx, 0), LP_SPI_TAG, "LP IO Matrix connect in signal failed for %d", pin); diff --git a/components/ulp/lp_core/lp_core_uart.c b/components/ulp/lp_core/lp_core_uart.c index 89223de4c7e..f15fb617c8b 100644 --- a/components/ulp/lp_core/lp_core_uart.c +++ b/components/ulp/lp_core/lp_core_uart.c @@ -101,16 +101,24 @@ static esp_err_t lp_uart_config_io(gpio_num_t pin, rtc_gpio_mode_t direction, ui /* Connect pins */ const uart_periph_sig_t *upin = &uart_periph_signal[LP_UART_PORT_NUM].pins[idx]; #if !SOC_LP_GPIO_MATRIX_SUPPORTED - /* When LP_IO Matrix is not support, LP_IO Mux must be connected to the pins */ - ret = rtc_gpio_iomux_func_sel(pin, upin->iomux_func); -#else - /* If the configured pin is the default LP_IO Mux pin for LP UART, then set the LP_IO MUX function */ - if (upin->default_gpio == pin) { - ret = rtc_gpio_iomux_func_sel(pin, upin->iomux_func); + /* On targets that do not support the LP IO Matrix, LP UART uses fixed pads. + * rtc_gpio_iomux_output / rtc_gpio_iomux_input select the UART RTC IOMUX function and direction. */ + if (direction == RTC_GPIO_MODE_OUTPUT_ONLY) { + ret = rtc_gpio_iomux_output(pin, upin->iomux_func); } else { - /* Select FUNC1 for LP_IO Matrix */ - ret = rtc_gpio_iomux_func_sel(pin, 1); - /* Connect the LP_IO to the LP UART peripheral signal */ + ret = rtc_gpio_iomux_input(pin, upin->iomux_func, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx)); + } +#else + /* Default LP UART pin: same RTC IOMUX path as on targets that do not support the LP IO Matrix. */ + if (upin->default_gpio == pin) { + /* Select LP UART on this pin including direction and LP IO Matrix bypass. */ + if (direction == RTC_GPIO_MODE_OUTPUT_ONLY) { + ret = rtc_gpio_iomux_output(pin, upin->iomux_func); + } else { + ret = rtc_gpio_iomux_input(pin, upin->iomux_func, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx)); + } + } else { + /* Non-default pin: route LP UART TX/RX through the LP IO Matrix. */ if (direction == RTC_GPIO_MODE_OUTPUT_ONLY) { ret = lp_gpio_connect_out_signal(pin, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx), 0, 0); } else {